[PULL,07/23] tcg/mips: constify tcg_target_callee_save_regs

Message ID	20171010005600.28735-8-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 9 Oct 2017 17:55:44 -0700 Message-Id: <20171010005600.28735-8-richard.henderson@linaro.org> In-Reply-To: <20171010005600.28735-1-richard.henderson@linaro.org> References: <20171010005600.28735-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 07/23] tcg/mips: constify tcg_target_callee_save_regs Precedence: list Cc: peter.maydell@linaro.org, "Emilio G. Cota" <cota@braap.org> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	Queued TCG patches \| expand [PULL,00/23] Queued TCG patches [PULL,01/23] cputlb: bring back tlb_flush_count under !TLB_DEBUG [PULL,02/23] tcg: fix corruption of code_time profiling counter upon tb_flush [PULL,03/23] exec-all: fix typos in TranslationBlock's documentation [PULL,04/23] translate-all: make have_tb_lock static [PULL,05/23] cpu-exec: rename have_tb_lock to acquired_tb_lock in tb_find [PULL,06/23] tcg/i386: constify tcg_target_callee_save_regs [PULL,07/23] tcg/mips: constify tcg_target_callee_save_regs [PULL,08/23] tcg: remove addr argument from lookup_tb_ptr [PULL,09/23] tcg: consolidate TB lookups in tb_lookup__cpu_state [PULL,10/23] exec-all: bring tb->invalid into tb->cflags [PULL,11/23] translate-all: define and use DEBUG_TB_FLUSH_GATE [PULL,12/23] exec-all: introduce TB_PAGE_ADDR_FMT [PULL,13/23] translate-all: define and use DEBUG_TB_INVALIDATE_GATE [PULL,14/23] translate-all: define and use DEBUG_TB_CHECK_GATE [PULL,15/23] exec-all: extract tb->tc_* into a separate struct tc_tb [PULL,16/23] tci: move tci_regs to tcg_qemu_tb_exec's stack [PULL,17/23] tcg: take .helpers out of TCGContext [PULL,18/23] tcg: allocate optimizer temps with tcg_malloc [PULL,19/23] util: move qemu_real_host_page_size/mask to osdep.h [PULL,20/23] osdep: introduce qemu_mprotect_rwx/none [PULL,21/23] translate-all: use qemu_protect_rwx/none helpers [PULL,22/23] tcg: define TCG_HIGHWATER [PULL,23/23] tcg/mips: delete commented out extern keyword.

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20171010005600.28735-8-richard.henderson@linaro.org

State

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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Mon,  9 Oct 2017 17:55:44 -0700
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Subject: [Qemu-devel] [PULL 07/23] tcg/mips: constify
	tcg_target_callee_save_regs
Precedence: list
Cc: peter.maydell@linaro.org, "Emilio G. Cota" <cota@braap.org>
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Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>

Series

Queued TCG patches | expand

Commit Message

Richard Henderson Oct. 10, 2017, 12:55 a.m. UTC

From: "Emilio G. Cota" <cota@braap.org>


Reviewed-by: Richard Henderson <rth@twiddle.net>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Emilio G. Cota <cota@braap.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/mips/tcg-target.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.13.6

diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index ce4030602f..e993138930 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -2341,7 +2341,7 @@  static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
     }
 }
 
-static int tcg_target_callee_save_regs[] = {
+static const int tcg_target_callee_save_regs[] = {
     TCG_REG_S0,       /* used for the global env (TCG_AREG0) */
     TCG_REG_S1,
     TCG_REG_S2,

[PULL,07/23] tcg/mips: constify tcg_target_callee_save_regs

Commit Message

Patch