[08/20] ARM: dts: aspeed: Add flash controller clocks

Message ID	20171211050704.20621-9-joel@jms.id.au
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Joel Stanley <joel@jms.id.au> To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Arnd Bergmann <arnd@arndb.de>, Andrew Jeffery <andrew@aj.id.au>, Patrick Venture <venture@google.com>, Xo Wang <xow@google.com>, Lei YU <mine260309@gmail.com> Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>, Benjamin Herrenschmidt <benh@kernel.crashing.org>, Jeremy Kerr <jk@ozlabs.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH 08/20] ARM: dts: aspeed: Add flash controller clocks Date: Mon, 11 Dec 2017 15:36:52 +1030 Message-Id: <20171211050704.20621-9-joel@jms.id.au> In-Reply-To: <20171211050704.20621-1-joel@jms.id.au> References: <20171211050704.20621-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk
Series	None \| expand [02/20] dt-bindings: gpio: Add ASPEED constants [03/20] ARM: dts: aspeed-g4: Correct VUART IRQ number [04/20] ARM: dts: aspeed: Add LPC and child devices [05/20] ARM: dts: aspeed: Add proper clock references [07/20] ARM: dts: aspeed: Add watchdog clocks [08/20] ARM: dts: aspeed: Add flash controller clocks [09/20] ARM: dts: aspeed: Add clock phandle to GPIO [10/20] ARM: dts: aspeed: Add PWM and tachometer node [11/20] ARM: dts: aspeed: Add LPC Snoop device [14/20] ARM: dts: Add OpenBMC flash layout [15/20] ARM: dts: aspeed: Sort ASPEED entries in makefile [16/20] ARM: dts: aspeed: Add Witherspoon BMC machine [17/20] ARM: dts: aspeed: Add Ingrasys Zaius BMC machine [18/20] ARM: dts: aspeed: Add Qanta Q71L BMC machine [19/20] ARM: dts: aspeed-romulus: Update Romulus system [20/20] ARM: dts: aspeed-plametto: Add flash layout

Message ID

20171211050704.20621-9-joel@jms.id.au

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Superseded

Headers

Received-SPF: pass (google.com: best guess record for domain of
	linux-kernel-owner@vger.kernel.org designates 209.132.180.67
	as permitted sender) client-ip=209.132.180.67; 
From: Joel Stanley <joel@jms.id.au>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>, Andrew Jeffery <andrew@aj.id.au>,
	Patrick Venture <venture@google.com>, Xo Wang <xow@google.com>,
	Lei YU <mine260309@gmail.com>
Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>, Jeremy Kerr
	<jk@ozlabs.org>, devicetree@vger.kernel.org, 
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
	linux-aspeed@lists.ozlabs.org
Subject: [PATCH 08/20] ARM: dts: aspeed: Add flash controller clocks
Date: Mon, 11 Dec 2017 15:36:52 +1030
Message-Id: <20171211050704.20621-9-joel@jms.id.au>
In-Reply-To: <20171211050704.20621-1-joel@jms.id.au>
References: <20171211050704.20621-1-joel@jms.id.au>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Series

None | expand

Commit Message

Joel Stanley Dec. 11, 2017, 5:06 a.m. UTC

Signed-off-by: Joel Stanley <joel@jms.id.au>

---
 arch/arm/boot/dts/aspeed-g4.dtsi | 2 ++
 arch/arm/boot/dts/aspeed-g5.dtsi | 3 +++
 2 files changed, 5 insertions(+)

-- 
2.14.1

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 2e3666d4fbeb..afac0ca0cb10 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -56,6 +56,7 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "aspeed,ast2400-fmc";
+			clocks = <&syscon ASPEED_CLK_AHB>;
 			status = "disabled";
 			interrupts = <19>;
 			flash@0 {
@@ -71,6 +72,7 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "aspeed,ast2400-spi";
+			clocks = <&syscon ASPEED_CLK_AHB>;
 			status = "disabled";
 			flash@0 {
 				reg = < 0 >;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 24bb2d16b900..f3689caf6fe2 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -56,6 +56,7 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "aspeed,ast2500-fmc";
+			clocks = <&syscon ASPEED_CLK_AHB>;
 			status = "disabled";
 			interrupts = <19>;
 			flash@0 {
@@ -81,6 +82,7 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "aspeed,ast2500-spi";
+			clocks = <&syscon ASPEED_CLK_AHB>;
 			status = "disabled";
 			flash@0 {
 				reg = < 0 >;
@@ -100,6 +102,7 @@ 
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "aspeed,ast2500-spi";
+			clocks = <&syscon ASPEED_CLK_AHB>;
 			status = "disabled";
 			flash@0 {
 				reg = < 0 >;

[08/20] ARM: dts: aspeed: Add flash controller clocks

Commit Message

Patch