| Message ID | 20180124143517.18469-8-andre.przywara@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: vGICv3: clean up optional DT properties | expand |
Hi Andre, On 24/01/18 14:35, Andre Przywara wrote: > The last patch removed the usage of the hardware's redistributor-stride > value from our (Dom0) GICv3 emulation. This means we no longer need to > store this value in the VGIC data structure. > Remove that variable and every code snippet that handled that, instead > simply always use the architected value. > > Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Acked-by: Julien Grall <julien.grall@linaro.org> Cheers, > --- > xen/arch/arm/gic-v3.c | 3 +-- > xen/arch/arm/vgic-v3.c | 14 -------------- > xen/include/asm-arm/domain.h | 1 - > xen/include/asm-arm/vgic.h | 1 - > xen/include/public/arch-arm.h | 2 -- > 5 files changed, 1 insertion(+), 20 deletions(-) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 1684d9cf1b..588fe94cab 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -1693,8 +1693,7 @@ static int __init gicv3_init(void) > reg = readl_relaxed(GICD + GICD_TYPER); > intid_bits = GICD_TYPE_ID_BITS(reg); > > - vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, > - gicv3.rdist_stride, intid_bits); > + vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, intid_bits); > gicv3_init_v2(); > > spin_lock_init(&gicv3.lock); > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c > index b4159317dd..47856a0a73 100644 > --- a/xen/arch/arm/vgic-v3.c > +++ b/xen/arch/arm/vgic-v3.c > @@ -58,21 +58,18 @@ static struct { > /* Re-distributor regions */ > unsigned int nr_rdist_regions; > const struct rdist_region *regions; > - uint32_t rdist_stride; /* Re-distributor stride */ > unsigned int intid_bits; /* Number of interrupt ID bits */ > } vgic_v3_hw; > > void vgic_v3_setup_hw(paddr_t dbase, > unsigned int nr_rdist_regions, > const struct rdist_region *regions, > - uint32_t rdist_stride, > unsigned int intid_bits) > { > vgic_v3_hw.enabled = true; > vgic_v3_hw.dbase = dbase; > vgic_v3_hw.nr_rdist_regions = nr_rdist_regions; > vgic_v3_hw.regions = regions; > - vgic_v3_hw.rdist_stride = rdist_stride; > vgic_v3_hw.intid_bits = intid_bits; > } > > @@ -1680,15 +1677,6 @@ static int vgic_v3_domain_init(struct domain *d) > > d->arch.vgic.dbase = vgic_v3_hw.dbase; > > - d->arch.vgic.rdist_stride = vgic_v3_hw.rdist_stride; > - /* > - * If the stride is not set, the default stride for GICv3 is 2 * 64K: > - * - first 64k page for Control and Physical LPIs > - * - second 64k page for Control and Generation of SGIs > - */ > - if ( !d->arch.vgic.rdist_stride ) > - d->arch.vgic.rdist_stride = 2 * SZ_64K; > - > for ( i = 0; i < vgic_v3_hw.nr_rdist_regions; i++ ) > { > paddr_t size = vgic_v3_hw.regions[i].size; > @@ -1708,8 +1696,6 @@ static int vgic_v3_domain_init(struct domain *d) > { > d->arch.vgic.dbase = GUEST_GICV3_GICD_BASE; > > - d->arch.vgic.rdist_stride = GUEST_GICV3_RDIST_STRIDE; > - > /* The first redistributor should contain enough space for all CPUs */ > BUILD_BUG_ON((GUEST_GICV3_GICR0_SIZE / GICV3_GICR_SIZE) < MAX_VIRT_CPUS); > d->arch.vgic.rdist_regions[0].base = GUEST_GICV3_GICR0_BASE; > diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h > index 4fe189b1c3..3eda7196ff 100644 > --- a/xen/include/asm-arm/domain.h > +++ b/xen/include/asm-arm/domain.h > @@ -108,7 +108,6 @@ struct arch_domain > unsigned int first_cpu; /* First CPU handled */ > } *rdist_regions; > int nr_regions; /* Number of rdist regions */ > - uint32_t rdist_stride; /* Re-Distributor stride */ > unsigned long int nr_lpis; > uint64_t rdist_propbase; > struct rb_root its_devices; /* Devices mapped to an ITS */ > diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h > index 2a93a7bef9..7919cc53f4 100644 > --- a/xen/include/asm-arm/vgic.h > +++ b/xen/include/asm-arm/vgic.h > @@ -255,7 +255,6 @@ struct rdist_region; > void vgic_v3_setup_hw(paddr_t dbase, > unsigned int nr_rdist_regions, > const struct rdist_region *regions, > - uint32_t rdist_stride, > unsigned int intid_bits); > #endif > > diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h > index ca79ab6284..3bca165fbf 100644 > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -401,8 +401,6 @@ typedef uint64_t xen_callback_t; > #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000) > #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000) > > -#define GUEST_GICV3_RDIST_STRIDE xen_mk_ullong(0x00020000) > - > #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ > #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000) > >
diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 1684d9cf1b..588fe94cab 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1693,8 +1693,7 @@ static int __init gicv3_init(void) reg = readl_relaxed(GICD + GICD_TYPER); intid_bits = GICD_TYPE_ID_BITS(reg); - vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, - gicv3.rdist_stride, intid_bits); + vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions, intid_bits); gicv3_init_v2(); spin_lock_init(&gicv3.lock); diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index b4159317dd..47856a0a73 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -58,21 +58,18 @@ static struct { /* Re-distributor regions */ unsigned int nr_rdist_regions; const struct rdist_region *regions; - uint32_t rdist_stride; /* Re-distributor stride */ unsigned int intid_bits; /* Number of interrupt ID bits */ } vgic_v3_hw; void vgic_v3_setup_hw(paddr_t dbase, unsigned int nr_rdist_regions, const struct rdist_region *regions, - uint32_t rdist_stride, unsigned int intid_bits) { vgic_v3_hw.enabled = true; vgic_v3_hw.dbase = dbase; vgic_v3_hw.nr_rdist_regions = nr_rdist_regions; vgic_v3_hw.regions = regions; - vgic_v3_hw.rdist_stride = rdist_stride; vgic_v3_hw.intid_bits = intid_bits; } @@ -1680,15 +1677,6 @@ static int vgic_v3_domain_init(struct domain *d) d->arch.vgic.dbase = vgic_v3_hw.dbase; - d->arch.vgic.rdist_stride = vgic_v3_hw.rdist_stride; - /* - * If the stride is not set, the default stride for GICv3 is 2 * 64K: - * - first 64k page for Control and Physical LPIs - * - second 64k page for Control and Generation of SGIs - */ - if ( !d->arch.vgic.rdist_stride ) - d->arch.vgic.rdist_stride = 2 * SZ_64K; - for ( i = 0; i < vgic_v3_hw.nr_rdist_regions; i++ ) { paddr_t size = vgic_v3_hw.regions[i].size; @@ -1708,8 +1696,6 @@ static int vgic_v3_domain_init(struct domain *d) { d->arch.vgic.dbase = GUEST_GICV3_GICD_BASE; - d->arch.vgic.rdist_stride = GUEST_GICV3_RDIST_STRIDE; - /* The first redistributor should contain enough space for all CPUs */ BUILD_BUG_ON((GUEST_GICV3_GICR0_SIZE / GICV3_GICR_SIZE) < MAX_VIRT_CPUS); d->arch.vgic.rdist_regions[0].base = GUEST_GICV3_GICR0_BASE; diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index 4fe189b1c3..3eda7196ff 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -108,7 +108,6 @@ struct arch_domain unsigned int first_cpu; /* First CPU handled */ } *rdist_regions; int nr_regions; /* Number of rdist regions */ - uint32_t rdist_stride; /* Re-Distributor stride */ unsigned long int nr_lpis; uint64_t rdist_propbase; struct rb_root its_devices; /* Devices mapped to an ITS */ diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index 2a93a7bef9..7919cc53f4 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -255,7 +255,6 @@ struct rdist_region; void vgic_v3_setup_hw(paddr_t dbase, unsigned int nr_rdist_regions, const struct rdist_region *regions, - uint32_t rdist_stride, unsigned int intid_bits); #endif diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index ca79ab6284..3bca165fbf 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -401,8 +401,6 @@ typedef uint64_t xen_callback_t; #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000) #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000) -#define GUEST_GICV3_RDIST_STRIDE xen_mk_ullong(0x00020000) - #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
The last patch removed the usage of the hardware's redistributor-stride value from our (Dom0) GICv3 emulation. This means we no longer need to store this value in the VGIC data structure. Remove that variable and every code snippet that handled that, instead simply always use the architected value. Signed-off-by: Andre Przywara <andre.przywara@linaro.org> --- xen/arch/arm/gic-v3.c | 3 +-- xen/arch/arm/vgic-v3.c | 14 -------------- xen/include/asm-arm/domain.h | 1 - xen/include/asm-arm/vgic.h | 1 - xen/include/public/arch-arm.h | 2 -- 5 files changed, 1 insertion(+), 20 deletions(-)