@@ -33,12 +33,12 @@ static const char * const seattle_dt_compat[] __initconst =
*/
static void seattle_system_reset(void)
{
- call_smc(PSCI_0_2_FN32(SYSTEM_RESET), 0, 0, 0);
+ call_smc(PSCI_0_2_FN32_SYSTEM_RESET, 0, 0, 0);
}
static void seattle_system_off(void)
{
- call_smc(PSCI_0_2_FN32(SYSTEM_OFF), 0, 0, 0);
+ call_smc(PSCI_0_2_FN32_SYSTEM_OFF, 0, 0, 0);
}
PLATFORM_START(seattle, "SEATTLE")
@@ -31,9 +31,9 @@
* (native-width) function ID.
*/
#ifdef CONFIG_ARM_64
-#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64(name)
+#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name
#else
-#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32(name)
+#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name
#endif
uint32_t psci_ver;
@@ -48,13 +48,13 @@ int call_psci_cpu_on(int cpu)
void call_psci_system_off(void)
{
if ( psci_ver > PSCI_VERSION(0, 1) )
- call_smc(PSCI_0_2_FN32(SYSTEM_OFF), 0, 0, 0);
+ call_smc(PSCI_0_2_FN32_SYSTEM_OFF, 0, 0, 0);
}
void call_psci_system_reset(void)
{
if ( psci_ver > PSCI_VERSION(0, 1) )
- call_smc(PSCI_0_2_FN32(SYSTEM_RESET), 0, 0, 0);
+ call_smc(PSCI_0_2_FN32_SYSTEM_RESET, 0, 0, 0);
}
int __init psci_is_smc_method(const struct dt_device_node *psci)
@@ -144,7 +144,7 @@ int __init psci_init_0_2(void)
}
}
- psci_ver = call_smc(PSCI_0_2_FN32(PSCI_VERSION), 0, 0, 0);
+ psci_ver = call_smc(PSCI_0_2_FN32_PSCI_VERSION, 0, 0, 0);
/* For the moment, we only support PSCI 0.2 and PSCI 1.x */
if ( psci_ver != PSCI_VERSION(0, 2) && PSCI_VERSION_MAJOR(psci_ver) != 1 )
@@ -243,35 +243,35 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
*/
switch ( fid )
{
- case PSCI_0_2_FN32(PSCI_VERSION):
+ case PSCI_0_2_FN32_PSCI_VERSION:
perfc_incr(vpsci_version);
PSCI_SET_RESULT(regs, do_psci_0_2_version());
return true;
- case PSCI_0_2_FN32(CPU_OFF):
+ case PSCI_0_2_FN32_CPU_OFF:
perfc_incr(vpsci_cpu_off);
PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off());
return true;
- case PSCI_0_2_FN32(MIGRATE_INFO_TYPE):
+ case PSCI_0_2_FN32_MIGRATE_INFO_TYPE:
perfc_incr(vpsci_migrate_info_type);
PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type());
return true;
- case PSCI_0_2_FN32(SYSTEM_OFF):
+ case PSCI_0_2_FN32_SYSTEM_OFF:
perfc_incr(vpsci_system_off);
do_psci_0_2_system_off();
PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE);
return true;
- case PSCI_0_2_FN32(SYSTEM_RESET):
+ case PSCI_0_2_FN32_SYSTEM_RESET:
perfc_incr(vpsci_system_reset);
do_psci_0_2_system_reset();
PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE);
return true;
- case PSCI_0_2_FN32(CPU_ON):
- case PSCI_0_2_FN64(CPU_ON):
+ case PSCI_0_2_FN32_CPU_ON:
+ case PSCI_0_2_FN64_CPU_ON:
{
register_t vcpuid = PSCI_ARG(regs, 1);
register_t epoint = PSCI_ARG(regs, 2);
@@ -282,8 +282,8 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
return true;
}
- case PSCI_0_2_FN32(CPU_SUSPEND):
- case PSCI_0_2_FN64(CPU_SUSPEND):
+ case PSCI_0_2_FN32_CPU_SUSPEND:
+ case PSCI_0_2_FN64_CPU_SUSPEND:
{
uint32_t pstate = PSCI_ARG32(regs, 1);
register_t epoint = PSCI_ARG(regs, 2);
@@ -294,8 +294,8 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint32_t fid)
return true;
}
- case PSCI_0_2_FN32(AFFINITY_INFO):
- case PSCI_0_2_FN64(AFFINITY_INFO):
+ case PSCI_0_2_FN32_AFFINITY_INFO:
+ case PSCI_0_2_FN64_AFFINITY_INFO:
{
register_t taff = PSCI_ARG(regs, 1);
uint32_t laff = PSCI_ARG32(regs, 2);
@@ -23,22 +23,27 @@ void call_psci_system_off(void);
void call_psci_system_reset(void);
/* PSCI v0.2 interface */
-#define PSCI_0_2_FN32(name) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
- ARM_SMCCC_CONV_32, \
- ARM_SMCCC_OWNER_STANDARD, \
- PSCI_0_2_FN_##name)
-#define PSCI_0_2_FN64(name) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
- ARM_SMCCC_CONV_64, \
- ARM_SMCCC_OWNER_STANDARD, \
- PSCI_0_2_FN_##name)
-#define PSCI_0_2_FN_PSCI_VERSION 0
-#define PSCI_0_2_FN_CPU_SUSPEND 1
-#define PSCI_0_2_FN_CPU_OFF 2
-#define PSCI_0_2_FN_CPU_ON 3
-#define PSCI_0_2_FN_AFFINITY_INFO 4
-#define PSCI_0_2_FN_MIGRATE_INFO_TYPE 6
-#define PSCI_0_2_FN_SYSTEM_OFF 8
-#define PSCI_0_2_FN_SYSTEM_RESET 9
+#define PSCI_0_2_FN32(nr) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_CONV_32, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ nr)
+#define PSCI_0_2_FN64(nr) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_CONV_64, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ nr)
+
+#define PSCI_0_2_FN32_PSCI_VERSION PSCI_0_2_FN32(0)
+#define PSCI_0_2_FN32_CPU_SUSPEND PSCI_0_2_FN32(1)
+#define PSCI_0_2_FN32_CPU_OFF PSCI_0_2_FN32(2)
+#define PSCI_0_2_FN32_CPU_ON PSCI_0_2_FN32(3)
+#define PSCI_0_2_FN32_AFFINITY_INFO PSCI_0_2_FN32(4)
+#define PSCI_0_2_FN32_MIGRATE_INFO_TYPE PSCI_0_2_FN32(6)
+#define PSCI_0_2_FN32_SYSTEM_OFF PSCI_0_2_FN32(8)
+#define PSCI_0_2_FN32_SYSTEM_RESET PSCI_0_2_FN32(9)
+
+#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
+#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
+#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)
/* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
#define PSCI_0_2_AFFINITY_LEVEL_ON 0