Message ID | 20180417221246.14672-1-richard.henderson@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | [for-2.13] tcg: Allow wider vectors for cmp and mul | expand |
On 17 April 2018 at 23:12, Richard Henderson <richard.henderson@linaro.org> wrote: > In db432672, we allow wide inputs for operations such as add. > However, in 212be173 and 3774030a we didn't do the same for > compare and multiply. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Can we hit these asserts in the uses of tcg_gen_mul_vec and tcg_gen_cmp_vec currently in the aarch64 frontend, or is this only a problem for the not-yet-landed SVE code? I notice that do_shifti() also has a tcg_debug_assert(at->base_type == type); Is that assert correct, or should it also be changed to >= ? thanks -- PMM
On 04/19/2018 12:17 AM, Peter Maydell wrote: > On 17 April 2018 at 23:12, Richard Henderson > <richard.henderson@linaro.org> wrote: >> In db432672, we allow wide inputs for operations such as add. >> However, in 212be173 and 3774030a we didn't do the same for >> compare and multiply. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > Can we hit these asserts in the uses of tcg_gen_mul_vec > and tcg_gen_cmp_vec currently in the aarch64 frontend, or > is this only a problem for the not-yet-landed SVE code? Only sve code -- it requires a VQ that is not a power of 2, e.g. 3. > I notice that do_shifti() also has a > tcg_debug_assert(at->base_type == type); > Is that assert correct, or should it also be changed to >= ? I think that one is correct. This assert is hit for something like mul z3, z2, z1[0] where we dup the scalar to our widest host vector width and then multiply. In the case of VQ=3, the dup might be to v256, one v256 multiply, and one v128 multiply. r~
On 19 April 2018 at 18:32, Richard Henderson <richard.henderson@linaro.org> wrote: > On 04/19/2018 12:17 AM, Peter Maydell wrote: >> On 17 April 2018 at 23:12, Richard Henderson >> <richard.henderson@linaro.org> wrote: >>> In db432672, we allow wide inputs for operations such as add. >>> However, in 212be173 and 3774030a we didn't do the same for >>> compare and multiply. >>> >>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> >> Can we hit these asserts in the uses of tcg_gen_mul_vec >> and tcg_gen_cmp_vec currently in the aarch64 frontend, or >> is this only a problem for the not-yet-landed SVE code? > > Only sve code -- it requires a VQ that is not a power of 2, e.g. 3. > >> I notice that do_shifti() also has a >> tcg_debug_assert(at->base_type == type); >> Is that assert correct, or should it also be changed to >= ? > > I think that one is correct. This assert is hit for something like > > mul z3, z2, z1[0] > > where we dup the scalar to our widest host vector width and then multiply. In > the case of VQ=3, the dup might be to v256, one v256 multiply, and one v128 > multiply. Cool. In that case Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c index 70ec889bc1..2ca219734d 100644 --- a/tcg/tcg-op-vec.c +++ b/tcg/tcg-op-vec.c @@ -355,8 +355,8 @@ void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGType type = rt->base_type; int can; - tcg_debug_assert(at->base_type == type); - tcg_debug_assert(bt->base_type == type); + tcg_debug_assert(at->base_type >= type); + tcg_debug_assert(bt->base_type >= type); can = tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece); if (can > 0) { vec_gen_4(INDEX_op_cmp_vec, type, vece, ri, ai, bi, cond); @@ -377,8 +377,8 @@ void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b) TCGType type = rt->base_type; int can; - tcg_debug_assert(at->base_type == type); - tcg_debug_assert(bt->base_type == type); + tcg_debug_assert(at->base_type >= type); + tcg_debug_assert(bt->base_type >= type); can = tcg_can_emit_vec_op(INDEX_op_mul_vec, type, vece); if (can > 0) { vec_gen_3(INDEX_op_mul_vec, type, vece, ri, ai, bi);
In db432672, we allow wide inputs for operations such as add. However, in 212be173 and 3774030a we didn't do the same for compare and multiply. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/tcg-op-vec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.14.3