@@ -189,8 +189,11 @@ [Components.common]
#
# GPIO
#
+ Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf
ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
+ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf
+
#
# MMC/SD
#
@@ -120,8 +120,11 @@ [FV.FvMain]
#
# GPIO
#
+ INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf
INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
+ INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf
+
#
# Multimedia Card Interface
#
new file mode 100644
@@ -0,0 +1,102 @@
+/** @file
+*
+* Copyright (c) 2018, Linaro Ltd. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "HiKeyDxe.h"
+
+STATIC
+VOID
+UartInit (
+ IN VOID
+ )
+{
+ UINT32 Val;
+
+ /* make UART1 out of reset */
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1);
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1);
+ /* make UART2 out of reset */
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2);
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2);
+ /* make UART3 out of reset */
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3);
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3);
+ /* make UART4 out of reset */
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4);
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4);
+
+ /* make DW_MMC2 out of reset */
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2);
+
+ /* enable clock for BT/WIFI */
+ Val = MmioRead32 (PMUSSI_ONOFF8_REG) | PMUSSI_ONOFF8_EN_32KB;
+ MmioWrite32 (PMUSSI_ONOFF8_REG, Val);
+}
+
+STATIC
+VOID
+MtcmosInit (
+ IN VOID
+ )
+{
+ UINT32 Data;
+
+ /* enable MTCMOS for GPU */
+ MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D);
+ do {
+ Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0);
+ } while ((Data & PW_EN0_G3D) == 0);
+}
+
+EFI_STATUS
+HiKeyInitPeripherals (
+ IN VOID
+ )
+{
+ UINT32 Data, Bits;
+
+ /* make I2C0/I2C1/I2C2/SPI0 out of reset */
+ Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | \
+ PERIPH_RST3_SSP;
+ MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, Bits);
+
+ do {
+ Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3);
+ } while (Data & Bits);
+
+ UartInit ();
+ /* MTCMOS -- Multi-threshold CMOS */
+ MtcmosInit ();
+
+ /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */
+ MmioWrite32 (IOCG_084_REG, 0); /* configure GPIO24 as nopull */
+ MmioWrite32 (IOMG_080_REG, 0); /* configure GPIO24 as GPIO */
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+HiKeyEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = HiKeyInitPeripherals ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ return Status;
+}
new file mode 100644
@@ -0,0 +1,31 @@
+/** @file
+*
+* Copyright (c) 2018, Linaro Ltd. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __HIKEYDXE_H__
+#define __HIKEYDXE_H__
+
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/UefiLib.h>
+
+#include <Hi6220.h>
+#include <Hi6220RegsPeri.h>
+
+#define DETECT_J15_FASTBOOT 24 // GPIO3_0
+
+#define ADB_REBOOT_ADDRESS 0x05F01000
+#define ADB_REBOOT_BOOTLOADER 0x77665500
+#define ADB_REBOOT_NONE 0x77665501
+
+#endif /* __HIKEYDXE_H__ */
new file mode 100644
@@ -0,0 +1,40 @@
+#
+# Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2018, Linaro Ltd. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+[Defines]
+ INF_VERSION = 0x0001001a
+ BASE_NAME = HiKeyDxe
+ FILE_GUID = f567684b-1089-4214-8881-d64b20cbda2f
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = HiKeyEntryPoint
+
+[Sources.common]
+ HiKeyDxe.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+ UefiLib
+ UefiDriverEntryPoint
+
+[Guids]
+ gEfiEndOfDxeEventGroupGuid
+
+[Depex]
+ TRUE
@@ -23,6 +23,12 @@
#define HI6220_PERIPH_BASE 0xF4000000
#define HI6220_PERIPH_SZ 0x05800000
+#define IOMG_BASE 0xF7010000
+#define IOMG_080_REG (IOMG_BASE + 0x140)
+
+#define IOCG_BASE 0xF7010800
+#define IOCG_084_REG (IOCG_BASE + 0x150)
+
#define PERI_CTRL_BASE 0xF7030000
#define SC_PERIPH_CTRL4 0x00C
#define CTRL4_FPGA_EXT_PHY_SEL BIT3
new file mode 100644
@@ -0,0 +1,50 @@
+/** @file
+*
+* Copyright (c) 2018, Linaro Ltd. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __HI6220_REGS_PERI_H__
+#define __HI6220_REGS_PERI_H__
+
+#define SC_PERIPH_CLKEN3 0x230
+#define SC_PERIPH_RSTEN3 0x330
+#define SC_PERIPH_RSTDIS0 0x304
+#define SC_PERIPH_RSTDIS3 0x334
+#define SC_PERIPH_RSTSTAT3 0x338
+
+/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */
+#define PERIPH_RST0_MMC2 (1 << 2)
+
+/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */
+#define PERIPH_RST3_CSSYS (1 << 0)
+#define PERIPH_RST3_I2C0 (1 << 1)
+#define PERIPH_RST3_I2C1 (1 << 2)
+#define PERIPH_RST3_I2C2 (1 << 3)
+#define PERIPH_RST3_I2C3 (1 << 4)
+#define PERIPH_RST3_UART1 (1 << 5)
+#define PERIPH_RST3_UART2 (1 << 6)
+#define PERIPH_RST3_UART3 (1 << 7)
+#define PERIPH_RST3_UART4 (1 << 8)
+#define PERIPH_RST3_SSP (1 << 9)
+#define PERIPH_RST3_PWM (1 << 10)
+#define PERIPH_RST3_BLPWM (1 << 11)
+#define PERIPH_RST3_TSENSOR (1 << 12)
+#define PERIPH_RST3_DAPB (1 << 18)
+#define PERIPH_RST3_HKADC (1 << 19)
+#define PERIPH_RST3_CODEC_SSI (1 << 20)
+#define PERIPH_RST3_PMUSSI1 (1 << 22)
+
+#define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2))
+#define PMUSSI_ONOFF8_REG (PMUSSI_BASE + (0x1c << 2))
+#define PMUSSI_ONOFF8_EN_32KB BIT6
+
+#endif /* __HI6220_REGS_PERI_H__ */
Do some basic initialization on HiKey platform, such as pin setting, regulators and making peripherals out of reset mode. Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> --- Platform/Hisilicon/HiKey/HiKey.dsc | 3 + Platform/Hisilicon/HiKey/HiKey.fdf | 3 + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 102 ++++++++++++++++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h | 31 +++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 40 +++++++++ Silicon/Hisilicon/Hi6220/Include/Hi6220.h | 6 ++ Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h | 50 +++++++++++ 7 files changed, 235 insertions(+) create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h create mode 100644 Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf create mode 100644 Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel