Message ID | 20181116154808.25154-14-christophe.lyon@st.com |
---|---|
State | Superseded |
Headers | show
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[209.132.180.131]) by mx.google.com with ESMTPS id g5-v6si29397117pgl.419.2018.11.16.07.52.52 for <patch@linaro.org> (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 07:52:53 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-490276-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=u7fOxF2e; spf=pass (google.com: domain of gcc-patches-return-490276-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-490276-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=vW6bC7GPQKrsXqqKN4R1F5EchneCT4pKztiqAkiKnYFBqouBghi7+ m1ygzSfnjsrbrBZNNIWAgcWcqij3QY3R/QjFvFyDuihEYRlkbH8wGEqCjfy1u+L/ yZjGoB41gFmtx8ZCMrm+OENKCfS2WvwwZsho1SzbvnJRQVnujSskRU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=ZJbCtrZZwervOlkyJTUg8ylnKDw=; b=u7fOxF2ejoDkvcl/2kfRQtCH2OwZ kGDAJ4R4EZ2s5JO2Vr127QS6pHBez7EOG5Ex0g4Vy49KhvMfR74CHqnpUiCjAwsf lcg3e12fF97tE0E+OofhjoHhYt6RHzK6sq+yUpwQ5G54gDSke1/u7bAl9HU2Uzkm yicJNhejcQpln/4= Received: (qmail 19557 invoked by alias); 16 Nov 2018 15:52:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: <gcc-patches.gcc.gnu.org> List-Unsubscribe: <mailto:gcc-patches-unsubscribe-patch=linaro.org@gcc.gnu.org> List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-help@gcc.gnu.org> Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19546 invoked by uid 89); 16 Nov 2018 15:52:40 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 16 Nov 2018 15:52:39 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id wAGFiNul030535; Fri, 16 Nov 2018 16:52:37 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2nsxqxrpnm-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 16 Nov 2018 16:52:37 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5B6313A; Fri, 16 Nov 2018 15:52:36 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 466B02CFA; Fri, 16 Nov 2018 15:52:36 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 16 Nov 2018 16:52:35 +0100 From: Christophe Lyon <christophe.lyon@st.com> To: <gcc-patches@gcc.gnu.org> CC: <christophe.lyon@linaro.org> Subject: [ARM/FDPIC v4 13/20] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Date: Fri, 16 Nov 2018 16:47:41 +0100 Message-ID: <20181116154808.25154-14-christophe.lyon@st.com> In-Reply-To: <20181116154808.25154-1-christophe.lyon@st.com> References: <20181116154808.25154-1-christophe.lyon@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-IsSubscribed: yes |
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FDPIC ABI for ARM
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diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c index 564e4f13..6da6e3d 100644 --- a/libgcc/config/arm/unwind-arm.c +++ b/libgcc/config/arm/unwind-arm.c @@ -198,6 +198,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context, return _UVRSR_FAILED; vrs->core.r[regno] = *(_uw *) valuep; +#if defined(__ARM_ARCH_7M__) + /* Force LSB bit since we always run thumb code. */ + if (regno == 15) + vrs->core.r[regno] |= 1; +#endif return _UVRSR_OK; case _UVRSC_VFP: