@@ -22,6 +22,7 @@
* MA 02111-1307 USA
*/
+#include <common.h>
#include <asm/arch/tzpc.h>
#include <asm/io.h>
@@ -29,12 +30,20 @@
void tzpc_init(void)
{
struct exynos_tzpc *tzpc;
- unsigned int addr;
+ unsigned int addr, start, end;
- for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
+ if (cpu_is_exynos5()) {
+ start = TZPC0_BASE;
+ end = TZPC9_BASE;
+ } else if (cpu_is_exynos4()) {
+ start = TZPC1_BASE;
+ end = TZPC6_BASE;
+ }
+
+ for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) {
tzpc = (struct exynos_tzpc *)addr;
- if (addr == TZPC0_BASE)
+ if (addr == start)
writel(R0SIZE, &tzpc->r0size);
writel(DECPROTXSET, &tzpc->decprot0set);
@@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk
LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
+ifndef CONFIG_SPL_BUILD
COBJS-y += timer.o
COBJS-y += sromc.o
COBJS-$(CONFIG_PWM) += pwm.o
+endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
@@ -75,12 +75,14 @@ lowlevel_init:
bl mem_ctrl_init
1:
+ bl arch_cpu_init
bl tzpc_init
ldmia r13!, {ip,pc}
wakeup_reset:
bl system_clock_init
bl mem_ctrl_init
+ bl arch_cpu_init
bl tzpc_init
exit_wakeup:
@@ -92,6 +92,10 @@ LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
endif
+ifeq ($(SOC),exynos)
+LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
+endif
+
# Add GCC lib
ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o
This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> --- arch/arm/cpu/armv7/exynos/tzpc_init.c | 15 ++++++++++++--- arch/arm/cpu/armv7/s5p-common/Makefile | 2 ++ board/samsung/smdk5250/lowlevel_init.S | 2 ++ spl/Makefile | 4 ++++ 4 files changed, 20 insertions(+), 3 deletions(-)