diff mbox series

[08/26] target/arm: Decode PAuth within disas_data_proc_2src

Message ID 20181207103631.28193-9-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Implement ARMv8.3-PAuth | expand

Commit Message

Richard Henderson Dec. 7, 2018, 10:36 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate-a64.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.17.2

Comments

Peter Maydell Dec. 11, 2018, 3:31 p.m. UTC | #1 
On Fri, 7 Dec 2018 at 10:36, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/translate-a64.c | 8 ++++++++

>  1 file changed, 8 insertions(+)

>

> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

> index 7ba4c996cf..d034a5edf3 100644

> --- a/target/arm/translate-a64.c

> +++ b/target/arm/translate-a64.c

> @@ -4884,6 +4884,13 @@ static void disas_data_proc_2src(DisasContext *s, uint32_t insn)

>      case 11: /* RORV */

>          handle_shift_reg(s, A64_SHIFT_TYPE_ROR, sf, rm, rn, rd);

>          break;

> +    case 12: /* PACGA */

> +        if (sf == 0 || !dc_isar_feature(aa64_pauth, s)) {

> +            goto do_unallocated;

> +        }

> +        gen_helper_pacga(cpu_reg(s, rd), cpu_env,

> +                         cpu_reg(s, rn), cpu_reg_sp(s, rm));

> +        break;

>      case 16:

>      case 17:

>      case 18:

> @@ -4899,6 +4906,7 @@ static void disas_data_proc_2src(DisasContext *s, uint32_t insn)

>          break;

>      }

>      default:

> +    do_unallocated:

>          unallocated_encoding(s);

>          break;

>      }


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7ba4c996cf..d034a5edf3 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4884,6 +4884,13 @@  static void disas_data_proc_2src(DisasContext *s, uint32_t insn)
     case 11: /* RORV */
         handle_shift_reg(s, A64_SHIFT_TYPE_ROR, sf, rm, rn, rd);
         break;
+    case 12: /* PACGA */
+        if (sf == 0 || !dc_isar_feature(aa64_pauth, s)) {
+            goto do_unallocated;
+        }
+        gen_helper_pacga(cpu_reg(s, rd), cpu_env,
+                         cpu_reg(s, rn), cpu_reg_sp(s, rm));
+        break;
     case 16:
     case 17:
     case 18:
@@ -4899,6 +4906,7 @@  static void disas_data_proc_2src(DisasContext *s, uint32_t insn)
         break;
     }
     default:
+    do_unallocated:
         unallocated_encoding(s);
         break;
     }