| Message ID | 20181218063911.2112-24-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg, target/ppc vector improvements | expand |
On Mon, Dec 17, 2018 at 10:39:00PM -0800, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> > --- > target/ppc/translate/vsx-impl.inc.c | 12 +++++------- > 1 file changed, 5 insertions(+), 7 deletions(-) > > diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c > index 8ab1290026..d88d6bbd74 100644 > --- a/target/ppc/translate/vsx-impl.inc.c > +++ b/target/ppc/translate/vsx-impl.inc.c > @@ -1356,9 +1356,10 @@ static void gen_xxspltw(DisasContext *ctx) > > static void gen_xxspltib(DisasContext *ctx) > { > - unsigned char uim8 = IMM8(ctx->opcode); > - TCGv_i64 vsr = tcg_temp_new_i64(); > - if (xS(ctx->opcode) < 32) { > + uint8_t uim8 = IMM8(ctx->opcode); > + int rt = xT(ctx->opcode); > + > + if (rt < 32) { > if (unlikely(!ctx->altivec_enabled)) { > gen_exception(ctx, POWERPC_EXCP_VPU); > return; > @@ -1369,10 +1370,7 @@ static void gen_xxspltib(DisasContext *ctx) > return; > } > } > - tcg_gen_movi_i64(vsr, pattern(uim8)); > - set_cpu_vsrh(xT(ctx->opcode), vsr); > - set_cpu_vsrl(xT(ctx->opcode), vsr); > - tcg_temp_free_i64(vsr); > + tcg_gen_gvec_dup8i(vsr_full_offset(rt), 16, 16, uim8); > } > > static void gen_xxsldwi(DisasContext *ctx) -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 8ab1290026..d88d6bbd74 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1356,9 +1356,10 @@ static void gen_xxspltw(DisasContext *ctx) static void gen_xxspltib(DisasContext *ctx) { - unsigned char uim8 = IMM8(ctx->opcode); - TCGv_i64 vsr = tcg_temp_new_i64(); - if (xS(ctx->opcode) < 32) { + uint8_t uim8 = IMM8(ctx->opcode); + int rt = xT(ctx->opcode); + + if (rt < 32) { if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); return; @@ -1369,10 +1370,7 @@ static void gen_xxspltib(DisasContext *ctx) return; } } - tcg_gen_movi_i64(vsr, pattern(uim8)); - set_cpu_vsrh(xT(ctx->opcode), vsr); - set_cpu_vsrl(xT(ctx->opcode), vsr); - tcg_temp_free_i64(vsr); + tcg_gen_gvec_dup8i(vsr_full_offset(rt), 16, 16, uim8); } static void gen_xxsldwi(DisasContext *ctx)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/ppc/translate/vsx-impl.inc.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) -- 2.17.2