Message ID | 20181218164621.19072-1-ard.biesheuvel@linaro.org |
---|---|
State | New |
Headers | show |
Series | [edk2] Platform/FVP-AArch64: switch to the SBSA watchdog | expand |
On Tue, Dec 18, 2018 at 05:46:21PM +0100, Ard Biesheuvel wrote: > On the FVP Foundation model, the SP805 watchdog appears to be 'wired' > incorrectly, resulting in a watchdog counter that decrements at the > APB clock rate of 24 MHz instead of the usual 32 kHz. Since the > timer start value is only 32-bits wide, this makes the watchdog > unusable in UEFI, since the default timeout set by the DXE core is > 5 minutes, which is not representable in 32-bit at this clock rate. > > So switch to the SBSA watchdog instead, which is wired up to the > generic timer, and ticks at the correct rate. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> From my point of view: Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> But I'd like a nod from Sami or Thomas (added to cc) as well. > --- > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 7 ++++--- > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 2 +- > Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h | 3 +++ > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 +++ > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 7 ++++++- > 5 files changed, 17 insertions(+), 5 deletions(-) > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > index 7db1c675c3d9..0941edeaf53c 100644 > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > @@ -133,9 +133,10 @@ > gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 > > ## SBSA Watchdog Count > -!ifndef DISABLE_SBSA_WATCHDOG > gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1 > -!endif > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a440000 > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a450000 > + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59 > > !ifdef EDK2_ENABLE_PL111 > ## PL111 Versatile Express Motherboard controller > @@ -265,7 +266,7 @@ > !ifdef EDK2_ENABLE_PL111 > ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > !endif > - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > # SMBIOS Support > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > index 239029d05cf1..c3e573e1bb4f 100644 > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 > !ifdef EDK2_ENABLE_PL111 > INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > !endif > - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > # > # Semi-hosting filesystem > diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > index d856b6daa1d7..e267912ef5f5 100644 > --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > @@ -76,4 +76,7 @@ > #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1 > #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1 > > +#define SBSA_WATCHDOG_BASE 0x2a440000 > +#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB) > + > #endif > diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > index 53898c5e957e..511a2ac99b75 100644 > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > @@ -60,5 +60,8 @@ > gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase > gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength > > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase > + > [Ppis] > gArmMpCoreInfoPpiGuid > diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > index c8eefa0cf28b..eb8f6a48cd02 100644 > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > @@ -23,7 +23,7 @@ > #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 : 0) > > // Number of Virtual Memory Map Descriptors > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR) > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR) > > // DDR attributes > #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > @@ -175,6 +175,11 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryTable[Index].Attributes = CacheAttributes; > } > > + VirtualMemoryTable[++Index].PhysicalBase = SBSA_WATCHDOG_BASE; > + VirtualMemoryTable[Index].VirtualBase = SBSA_WATCHDOG_BASE; > + VirtualMemoryTable[Index].Length = SBSA_WATCHDOG_SIZE; > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > // End of Table > VirtualMemoryTable[++Index].PhysicalBase = 0; > VirtualMemoryTable[Index].VirtualBase = 0; > -- > 2.17.1 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Wed, Dec 19, 2018 at 10:04 PM Leif Lindholm <leif.lindholm@linaro.org> wrote: > > On Tue, Dec 18, 2018 at 05:46:21PM +0100, Ard Biesheuvel wrote: > > On the FVP Foundation model, the SP805 watchdog appears to be 'wired' > > incorrectly, resulting in a watchdog counter that decrements at the > > APB clock rate of 24 MHz instead of the usual 32 kHz. Since the > > timer start value is only 32-bits wide, this makes the watchdog > > unusable in UEFI, since the default timeout set by the DXE core is > > 5 minutes, which is not representable in 32-bit at this clock rate. > > > > So switch to the SBSA watchdog instead, which is wired up to the > > generic timer, and ticks at the correct rate. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > From my point of view: > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > > But I'd like a nod from Sami or Thomas (added to cc) as well. I have not been able test this patch yet but the changes looks fine. - Thomas. > > > --- > > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 7 ++++--- > > Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 2 +- > > Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h | 3 +++ > > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 +++ > > Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 7 ++++++- > > 5 files changed, 17 insertions(+), 5 deletions(-) > > > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > index 7db1c675c3d9..0941edeaf53c 100644 > > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc > > @@ -133,9 +133,10 @@ > > gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 > > > > ## SBSA Watchdog Count > > -!ifndef DISABLE_SBSA_WATCHDOG > > gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1 > > -!endif > > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a440000 > > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a450000 > > + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59 > > > > !ifdef EDK2_ENABLE_PL111 > > ## PL111 Versatile Express Motherboard controller > > @@ -265,7 +266,7 @@ > > !ifdef EDK2_ENABLE_PL111 > > ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > > !endif > > - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > > + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > > > # SMBIOS Support > > > > diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > > index 239029d05cf1..c3e573e1bb4f 100644 > > --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > > +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf > > @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 > > !ifdef EDK2_ENABLE_PL111 > > INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf > > !endif > > - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf > > + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > > > > # > > # Semi-hosting filesystem > > diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > > index d856b6daa1d7..e267912ef5f5 100644 > > --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > > +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h > > @@ -76,4 +76,7 @@ > > #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1 > > #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1 > > > > +#define SBSA_WATCHDOG_BASE 0x2a440000 > > +#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB) > > + > > #endif > > diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > > index 53898c5e957e..511a2ac99b75 100644 > > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > > @@ -60,5 +60,8 @@ > > gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase > > gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength > > > > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase > > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase > > + > > [Ppis] > > gArmMpCoreInfoPpiGuid > > diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > > index c8eefa0cf28b..eb8f6a48cd02 100644 > > --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > > +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > > @@ -23,7 +23,7 @@ > > #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 : 0) > > > > // Number of Virtual Memory Map Descriptors > > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR) > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR) > > > > // DDR attributes > > #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > @@ -175,6 +175,11 @@ ArmPlatformGetVirtualMemoryMap ( > > VirtualMemoryTable[Index].Attributes = CacheAttributes; > > } > > > > + VirtualMemoryTable[++Index].PhysicalBase = SBSA_WATCHDOG_BASE; > > + VirtualMemoryTable[Index].VirtualBase = SBSA_WATCHDOG_BASE; > > + VirtualMemoryTable[Index].Length = SBSA_WATCHDOG_SIZE; > > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > // End of Table > > VirtualMemoryTable[++Index].PhysicalBase = 0; > > VirtualMemoryTable[Index].VirtualBase = 0; > > -- > > 2.17.1 > > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Thu, 20 Dec 2018 at 11:03, Thomas Abraham <thomas.abraham@arm.com> wrote: > > On Wed, Dec 19, 2018 at 10:04 PM Leif Lindholm <leif.lindholm@linaro.org> wrote: > > > > On Tue, Dec 18, 2018 at 05:46:21PM +0100, Ard Biesheuvel wrote: > > > On the FVP Foundation model, the SP805 watchdog appears to be 'wired' > > > incorrectly, resulting in a watchdog counter that decrements at the > > > APB clock rate of 24 MHz instead of the usual 32 kHz. Since the > > > timer start value is only 32-bits wide, this makes the watchdog > > > unusable in UEFI, since the default timeout set by the DXE core is > > > 5 minutes, which is not representable in 32-bit at this clock rate. > > > > > > So switch to the SBSA watchdog instead, which is wired up to the > > > generic timer, and ticks at the correct rate. > > > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > > > From my point of view: > > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > > > > But I'd like a nod from Sami or Thomas (added to cc) as well. > > I have not been able test this patch yet but the changes looks fine. > > - Thomas. > Thanks all Pushed as dc6b5ef8a6c2..88e5de1a2346 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc index 7db1c675c3d9..0941edeaf53c 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc @@ -133,9 +133,10 @@ gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 ## SBSA Watchdog Count -!ifndef DISABLE_SBSA_WATCHDOG gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1 -!endif + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a440000 + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a450000 + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59 !ifdef EDK2_ENABLE_PL111 ## PL111 Versatile Express Motherboard controller @@ -265,7 +266,7 @@ !ifdef EDK2_ENABLE_PL111 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf !endif - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # SMBIOS Support diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf index 239029d05cf1..c3e573e1bb4f 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 !ifdef EDK2_ENABLE_PL111 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf !endif - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # # Semi-hosting filesystem diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h index d856b6daa1d7..e267912ef5f5 100644 --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h @@ -76,4 +76,7 @@ #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1 #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1 +#define SBSA_WATCHDOG_BASE 0x2a440000 +#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB) + #endif diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf index 53898c5e957e..511a2ac99b75 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf @@ -60,5 +60,8 @@ gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + [Ppis] gArmMpCoreInfoPpiGuid diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index c8eefa0cf28b..eb8f6a48cd02 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -23,7 +23,7 @@ #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 : 0) // Number of Virtual Memory Map Descriptors -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR) +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR) // DDR attributes #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK @@ -175,6 +175,11 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Attributes = CacheAttributes; } + VirtualMemoryTable[++Index].PhysicalBase = SBSA_WATCHDOG_BASE; + VirtualMemoryTable[Index].VirtualBase = SBSA_WATCHDOG_BASE; + VirtualMemoryTable[Index].Length = SBSA_WATCHDOG_SIZE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + // End of Table VirtualMemoryTable[++Index].PhysicalBase = 0; VirtualMemoryTable[Index].VirtualBase = 0;
On the FVP Foundation model, the SP805 watchdog appears to be 'wired' incorrectly, resulting in a watchdog counter that decrements at the APB clock rate of 24 MHz instead of the usual 32 kHz. Since the timer start value is only 32-bits wide, this makes the watchdog unusable in UEFI, since the default timeout set by the DXE core is 5 minutes, which is not representable in 32-bit at this clock rate. So switch to the SBSA watchdog instead, which is wired up to the generic timer, and ticks at the correct rate. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 7 ++++--- Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 2 +- Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h | 3 +++ Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 +++ Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 7 ++++++- 5 files changed, 17 insertions(+), 5 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel