@@ -2456,6 +2456,9 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA;
}
+ if (chan_is_logical(d40c))
+ d40_log_gim_unmask(&d40c->src_def_cfg, &d40c->dst_def_cfg);
+
dev_dbg(chan2dev(d40c), "allocated %s channel (phy %d%s)\n",
chan_is_logical(d40c) ? "logical" : "physical",
d40c->phy_chan->num,
@@ -50,6 +50,12 @@ void d40_log_cfg(struct stedma40_chan_cfg *cfg,
}
+void d40_log_gim_unmask(u32 *src_cfg, u32 *dst_cfg) {
+
+ *src_cfg |= 1 << D40_SREG_CFG_LOG_GIM_POS;
+ *dst_cfg |= 1 << D40_SREG_CFG_LOG_GIM_POS;
+}
+
/* Sets up SRC and DST CFG register for both logical and physical channels */
void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
u32 *src_cfg, u32 *dst_cfg, bool is_log)
@@ -107,11 +113,6 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
src |= 1 << D40_SREG_CFG_PRI_POS;
dst |= 1 << D40_SREG_CFG_PRI_POS;
}
-
- } else {
- /* Logical channel */
- dst |= 1 << D40_SREG_CFG_LOG_GIM_POS;
- src |= 1 << D40_SREG_CFG_LOG_GIM_POS;
}
if (cfg->src_info.big_endian)
@@ -430,6 +430,8 @@ enum d40_lli_flags {
LLI_LAST_LINK = 1 << 3,
};
+void d40_log_gim_unmask(u32 *src_cfg, u32 *dst_cfg);
+
void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
u32 *src_cfg,
u32 *dst_cfg,
During the initial setup of a logical channel, it is necessary to unmask the GIM in order to receive generated terminal count and error interrupts. We're separating out this required code so it will be possible to move the remaining code in d40_phy_cfg(), which is mostly runtime configuration into the runtime_config() routine. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Cc: Per Forlin <per.forlin@stericsson.com> Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Lee Jones <lee.jones@linaro.org> --- drivers/dma/ste_dma40.c | 3 +++ drivers/dma/ste_dma40_ll.c | 11 ++++++----- drivers/dma/ste_dma40_ll.h | 2 ++ 3 files changed, 11 insertions(+), 5 deletions(-)