diff mbox series

[Xen-devel,MM-PART2,v2,13/19] xen/arm32: mm: Avoid to zero and clean cache for CPU0 domheap

Message ID 20190514122136.28215-22-julien.grall@arm.com
State Superseded
Headers show
Series xen/arm: Clean-up & fixes in boot/mm code | expand

Commit Message

Julien Grall May 14, 2019, 12:21 p.m. UTC
The page-table walker is configured to use the same shareability and
cacheability as the access performed when updating the page-tables. This
means cleaning the cache for CPU0 domheap is unnecessary.

Furthermore, CPU0 page-tables are part of Xen binary and will already be
zeroed before been used. So it is pointless to zero the domheap again.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

---
    Changes in v2:
        - Tweak a bit the commit message
        - Add Andrii's reviewed-by
---
 xen/arch/arm/mm.c | 5 -----
 1 file changed, 5 deletions(-)
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Patch

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index e090afb976..cda2847d00 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -724,11 +724,6 @@  void __init setup_pagetables(unsigned long boot_phys_offset)
 #ifdef CONFIG_ARM_32
     per_cpu(xen_pgtable, 0) = cpu0_pgtable;
     per_cpu(xen_dommap, 0) = cpu0_dommap;
-
-    /* Make sure it is clear */
-    memset(this_cpu(xen_dommap), 0, DOMHEAP_SECOND_PAGES*PAGE_SIZE);
-    clean_dcache_va_range(this_cpu(xen_dommap),
-                              DOMHEAP_SECOND_PAGES*PAGE_SIZE);
 #endif
 }