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[v2] usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs

Message ID 20190614065253.9622-1-m.szyprowski@samsung.com
State New
Headers show
Series [v2] usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs | expand

Commit Message

Marek Szyprowski June 14, 2019, 6:52 a.m. UTC 
Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

Acked-by: Minas Harutyunyan <hminas@synopsys.com>

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>

Tested-by: Krzysztof Kozlowski <krzk@kernel.org>

---
v2:
- added collected tags
---
 drivers/usb/dwc2/params.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.17.1
diff mbox series

Patch

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 6900eea57526..9ece4affb9d4 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -76,6 +76,7 @@  static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
 	struct dwc2_core_params *p = &hsotg->params;
 
 	p->power_down = 0;
+	p->phy_utmi_width = 8;
 }
 
 static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)