diff mbox series

[Xen-devel,v3,12/28] xen/arm32: head: Introduce print_reg

Message ID	20190812173019.11956-13-julien.grall@arm.com
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; From: Julien Grall <julien.grall@arm.com> To: xen-devel@lists.xenproject.org Date: Mon, 12 Aug 2019 18:30:03 +0100 Message-Id: <20190812173019.11956-13-julien.grall@arm.com> In-Reply-To: <20190812173019.11956-1-julien.grall@arm.com> References: <20190812173019.11956-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH v3 12/28] xen/arm32: head: Introduce print_reg Precedence: list Cc: Julien Grall <julien.grall@arm.com>, Stefano Stabellini <sstabellini@kernel.org>, Volodymyr Babchuk <Volodymyr_Babchuk@epam.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" <xen-devel-bounces@lists.xenproject.org>
Series	xen/arm: Rework head.S to make it more compliant with the Arm Arm \| expand [Xen-devel,v3,00/28] xen/arm: Rework head.S to make it more compliant with the Arm Arm [Xen-devel,v3,01/28] xen/arm: lpae: Allow more LPAE helpers to be used in assembly [Xen-devel,v3,02/28] xen/arm64: head: Remove 1:1 mapping as soon as it is not used [Xen-devel,v3,03/28] xen/arm64: head: Rework and document setup_fixmap() [Xen-devel,v3,04/28] xen/arm64: head: Rework and document launch() [Xen-devel,v3,05/28] xen/arm64: head: Setup TTBR_EL2 in enable_mmu() and add missing isb [Xen-devel,v3,06/28] xen/arm64: head: Introduce a macro to get a PC-relative address of a symbol [Xen-devel,v3,07/28] xen/arm64: head: Fix typo in the documentation on top of init_uart() [Xen-devel,v3,08/28] xen/arm32: head: Add a macro to move an immediate constant into a 32-bit reg... [Xen-devel,v3,09/28] xen/arm32: head: Mark the end of subroutines with ENDPROC [Xen-devel,v3,10/28] xen/arm32: head: Don't clobber r14/lr in the macro PRINT [Xen-devel,v3,11/28] xen/arm32: head: Rework UART initialization on boot CPU [Xen-devel,v3,12/28] xen/arm32: head: Introduce print_reg [Xen-devel,v3,13/28] xen/arm32: head: Introduce distinct paths for the boot CPU and secondary CPUs [Xen-devel,v3,14/28] xen/arm32: head: Rework and document check_cpu_mode() [Xen-devel,v3,15/28] xen/arm32: head: Rework and document zero_bss() [Xen-devel,v3,16/28] xen/arm32: head: Document create_pages_tables() [Xen-devel,v3,17/28] xen/arm32: head: Document enable_mmu() [Xen-devel,v3,18/28] xen/arm32: head: Move assembly switch to the runtime PT in secondary CPUs path [Xen-devel,v3,19/28] xen/arm32: head: Don't setup the fixmap on secondary CPUs [Xen-devel,v3,20/28] xen/arm32: head: Remove 1:1 mapping as soon as it is not used [Xen-devel,v3,21/28] xen/arm32: head: Rework and document setup_fixmap() [Xen-devel,v3,22/28] xen/arm32: head: Rework and document launch() [Xen-devel,v3,23/28] xen/arm32: head: Setup HTTBR in enable_mmu() and add missing isb [Xen-devel,v3,24/28] xen/arm: Zero BSS after the MMU and D-cache is turned on [Xen-devel,v3,25/28] xen/arm64: head: Introduce macros to create table and mapping entry [Xen-devel,v3,26/28] xen/arm64: head: Use a page mapping for the 1:1 mapping in create_page_tables() [Xen-devel,v3,27/28] xen/arm32: head: Introduce macros to create table and mapping entry [Xen-devel,v3,28/28] xen/arm32: head: Use a page mapping for the 1:1 mapping in create_page_tables()

Commit Message

Julien Grall Aug. 12, 2019, 5:30 p.m. UTC

At the moment, the user should save r14/lr if it cares about it.

Follow-up patches will introduce more use of putn in place where lr
should be preserved.

Furthermore, any user of putn should also move the value to register r0
if it was stored in a different register.

For convenience, a new macro is introduced to print a given register.
The macro will take care for us to move the value to r0 and also
preserve lr.

Lastly the new macro is used to replace all the callsite of putn. This
will simplify rework/review later on.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

---
    Changes in v3:
        - Add Stefano's reviewed-by

    Changes in v2:
        - Patch added
---
 xen/arch/arm/arm32/head.S | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff mbox series

Patch

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index fd3a273550..c4ee06ba93 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -79,8 +79,25 @@ 
 98:     .asciz _s          ;\
         .align 2           ;\
 99:
+
+/*
+ * Macro to print the value of register \rb
+ *
+ * Clobbers r0 - r4
+ */
+.macro print_reg rb
+        mov   r0, \rb
+        mov   r4, lr
+        bl    putn
+        mov   lr, r4
+.endm
+
 #else /* CONFIG_EARLY_PRINTK */
 #define PRINT(s)
+
+.macro print_reg rb
+.endm
+
 #endif /* !CONFIG_EARLY_PRINTK */
 
         .arm
@@ -159,8 +176,7 @@  GLOBAL(init_secondary)
 #ifdef CONFIG_EARLY_PRINTK
         mov_w r11, EARLY_UART_BASE_ADDRESS   /* r11 := UART base address */
         PRINT("- CPU ")
-        mov   r0, r7
-        bl    putn
+        print_reg r7
         PRINT(" booting -\r\n")
 #endif
 
@@ -211,8 +227,7 @@  skip_bss:
         bne   1f
         mov   r4, r0
         PRINT("- Missing processor info: ")
-        mov   r0, r4
-        bl    putn
+        print_reg r4
         PRINT(" -\r\n")
         b     fail
 1: