| Message ID | 20190812173019.11956-24-julien.grall@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | xen/arm: Rework head.S to make it more compliant with the Arm Arm | expand |
On Mon, 12 Aug 2019, Julien Grall wrote: > At the moment, HTTBR is setup in create_page_tables(). This is fine as > it is called by every CPUs. > > However, such assumption may not hold in the future. To make change > easier, the HTTBR is not setup in enable_mmu(). > > Take the opportunity to add the missing isb() to ensure the HTTBR is > seen before the MMU is turned on. > > Lastly, the only use of r5 in create_page_tables() is now removed. So > the register can be removed from the clobber list of the function. > > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > Changes in v3: > - Move the comment in the correct place > - r5 is not cloberred anymore > > Changes in v2: > - Patch added > --- > xen/arch/arm/arm32/head.S | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S > index 3c18037575..2317fb8855 100644 > --- a/xen/arch/arm/arm32/head.S > +++ b/xen/arch/arm/arm32/head.S > @@ -359,7 +359,7 @@ ENDPROC(cpu_init) > * r9 : paddr(start) > * r10: phys offset > * > - * Clobbers r0 - r6 > + * Clobbers r0 - r4, r6 > * > * Register usage within this function: > * r6 : Identity map in place > @@ -374,11 +374,8 @@ create_page_tables: > moveq r6, #1 /* r6 := identity map now in place */ > movne r6, #0 /* r6 := identity map not yet in place */ > > - /* Write Xen's PT's paddr into the HTTBR */ > ldr r4, =boot_pgtable > add r4, r4, r10 /* r4 := paddr (boot_pagetable) */ > - mov r5, #0 /* r4:r5 is paddr (boot_pagetable) */ > - mcrr CP64(r4, r5, HTTBR) > > /* Setup boot_pgtable: */ > ldr r1, =boot_second > @@ -484,6 +481,13 @@ enable_mmu: > mcr CP32(r0, TLBIALLH) /* Flush hypervisor TLBs */ > dsb nsh > > + /* Write Xen's PT's paddr into the HTTBR */ > + ldr r0, =boot_pgtable > + add r0, r0, r10 /* r0 := paddr (boot_pagetable) */ > + mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ > + mcrr CP64(r0, r1, HTTBR) > + isb > + > mrc CP32(r0, HSCTLR) > /* Enable MMU and D-cache */ > orr r0, r0, #(SCTLR_Axx_ELx_M|SCTLR_Axx_ELx_C) > -- > 2.11.0 >
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 3c18037575..2317fb8855 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -359,7 +359,7 @@ ENDPROC(cpu_init) * r9 : paddr(start) * r10: phys offset * - * Clobbers r0 - r6 + * Clobbers r0 - r4, r6 * * Register usage within this function: * r6 : Identity map in place @@ -374,11 +374,8 @@ create_page_tables: moveq r6, #1 /* r6 := identity map now in place */ movne r6, #0 /* r6 := identity map not yet in place */ - /* Write Xen's PT's paddr into the HTTBR */ ldr r4, =boot_pgtable add r4, r4, r10 /* r4 := paddr (boot_pagetable) */ - mov r5, #0 /* r4:r5 is paddr (boot_pagetable) */ - mcrr CP64(r4, r5, HTTBR) /* Setup boot_pgtable: */ ldr r1, =boot_second @@ -484,6 +481,13 @@ enable_mmu: mcr CP32(r0, TLBIALLH) /* Flush hypervisor TLBs */ dsb nsh + /* Write Xen's PT's paddr into the HTTBR */ + ldr r0, =boot_pgtable + add r0, r0, r10 /* r0 := paddr (boot_pagetable) */ + mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ + mcrr CP64(r0, r1, HTTBR) + isb + mrc CP32(r0, HSCTLR) /* Enable MMU and D-cache */ orr r0, r0, #(SCTLR_Axx_ELx_M|SCTLR_Axx_ELx_C)
At the moment, HTTBR is setup in create_page_tables(). This is fine as it is called by every CPUs. However, such assumption may not hold in the future. To make change easier, the HTTBR is not setup in enable_mmu(). Take the opportunity to add the missing isb() to ensure the HTTBR is seen before the MMU is turned on. Lastly, the only use of r5 in create_page_tables() is now removed. So the register can be removed from the clobber list of the function. Signed-off-by: Julien Grall <julien.grall@arm.com> --- Changes in v3: - Move the comment in the correct place - r5 is not cloberred anymore Changes in v2: - Patch added --- xen/arch/arm/arm32/head.S | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)