[05/29,arm] fix constraints on addsi3_carryin_alt2

Message ID	20191018194900.34795-6-Richard.Earnshaw@arm.com
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Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of gcc-patches-return-511329-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; q=dns; s=default; b=V7n80mOLypJ+K6iI RDJbBSDmSvoWemC4xDIiehXqdPhlmhh2tOoUXR50ggGglYgfjcNyOF1vbPlDhWq4 YuT18kMH9c15/vDDcNSOPLjVXRz9UEEhP9ldqjSlfIrw1t98+S6FnlSoWjVU27AX Ybrp25bqqYqScGQHXNOPPt4vGqM= Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org From: Richard Earnshaw <Richard.Earnshaw@arm.com> To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw <Richard.Earnshaw@arm.com> Subject: [PATCH 05/29] [arm] fix constraints on addsi3_carryin_alt2 Date: Fri, 18 Oct 2019 20:48:36 +0100 Message-Id: <20191018194900.34795-6-Richard.Earnshaw@arm.com> In-Reply-To: <20191018194900.34795-1-Richard.Earnshaw@arm.com> References: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.17.1"
Series	Rewrite DImode arithmetic support \| expand [00/29,arm] Rewrite DImode arithmetic support [01/29,arm] Rip out DImode addition and subtraction splits. [02/29,arm] Perform early splitting of adddi3. [03/29,arm] Early split zero- and sign-extension [04/29,arm] Rewrite addsi3_carryin_shift_<optab> in canonical form [05/29,arm] fix constraints on addsi3_carryin_alt2 [06/29,arm] Early split subdi3 [07/29,arm] Remove redundant DImode subtract patterns [08/29,arm] Introduce arm_carry_operation [09/29,arm] Correctly cost addition with a carry-in [10/29,arm] Correct cost calculations involving borrow for subtracts. [11/29,arm] Reduce cost of insns that are simple reg-reg moves. [12/29,arm] Implement negscc using SBC when appropriate. [13/29,arm] Add alternative canonicalizations for subtract-with-carry + shift [14/29,arm] Early split simple DImode equality comparisons [15/29,arm] Improve handling of DImode comparisions against constants. [16/29,arm] early split most DImode comparison operations. [17/29,arm] Handle some constant comparisons using rsbs+rscs [18/29,arm] Cleanup dead code - old support for DImode comparisons [19/29,arm] Handle immediate values in uaddvsi4 [20/29,arm] Early expansion of uaddvdi4. [21/29,arm] Improve code generation for addvsi4. [22/29,arm] Allow the summation result of signed add-with-overflow to be discarded. [23/29,arm] Early split addvdi4 [24/29,arm] Improve constant handling for usubvsi4. [25/29,arm] Early expansion of usubvdi4. [26/29,arm] Improve constant handling for subvsi4. [27/29,arm] Early expansion of subvdi4 [28/29,arm] Improvements to negvsi4 and negvdi4. [29/29,arm] Fix testsuite nit when compiling for thumb2

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From: Richard Earnshaw <Richard.Earnshaw@arm.com>
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Subject: [PATCH 05/29] [arm] fix constraints on addsi3_carryin_alt2
Date: Fri, 18 Oct 2019 20:48:36 +0100
Message-Id: <20191018194900.34795-6-Richard.Earnshaw@arm.com>
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Series

Rewrite DImode arithmetic support | expand

Commit Message

Richard Earnshaw (lists) Oct. 18, 2019, 7:48 p.m. UTC

addsi3_carryin_alt2 has a more strict constraint than the predicate
when adding a constant.  This leads to sub-optimal code in some
circumstances.

	* config/arm/arm.md (addsi3_carryin_alt2): Use arm_not_operand for
	operand 2.
---
 gcc/config/arm/arm.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 9754a761faf..fbe154a9873 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -893,7 +893,7 @@  (define_insn "*addsi3_carryin_alt2_<optab>"
   [(set (match_operand:SI 0 "s_register_operand" "=l,r,r")
         (plus:SI (plus:SI (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))
                           (match_operand:SI 1 "s_register_operand" "%l,r,r"))
-                 (match_operand:SI 2 "arm_rhs_operand" "l,rI,K")))]
+                 (match_operand:SI 2 "arm_not_operand" "l,rI,K")))]
   "TARGET_32BIT"
   "@
    adc%?\\t%0, %1, %2

[05/29,arm] fix constraints on addsi3_carryin_alt2

Commit Message

Patch