diff mbox series

[v3,06/13] iommu/arm-smmu-v3: Add context descriptor tables allocators

Message ID 20191209180514.272727-7-jean-philippe@linaro.org
State New
Headers show
Series iommu: Add PASID support to Arm SMMUv3 | expand

Commit Message

Jean-Philippe Brucker Dec. 9, 2019, 6:05 p.m. UTC 
Support for SSID will require allocating context descriptor tables. Move
the context descriptor allocation to separate functions.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

---
 drivers/iommu/arm-smmu-v3.c | 57 ++++++++++++++++++++++++++++++-------
 1 file changed, 46 insertions(+), 11 deletions(-)

-- 
2.24.0

Comments

Eric Auger Dec. 17, 2019, 1:36 p.m. UTC | #1 
Hi Jean,

On 12/9/19 7:05 PM, Jean-Philippe Brucker wrote:
> Support for SSID will require allocating context descriptor tables. Move

> the context descriptor allocation to separate functions.

> 

> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

Reviewed-by: Eric Auger <eric.auger@redhat.com>


Thanks

Eric
> ---

>  drivers/iommu/arm-smmu-v3.c | 57 ++++++++++++++++++++++++++++++-------

>  1 file changed, 46 insertions(+), 11 deletions(-)

> 

> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c

> index b287e303b1d7..43d6a7ded6e4 100644

> --- a/drivers/iommu/arm-smmu-v3.c

> +++ b/drivers/iommu/arm-smmu-v3.c

> @@ -568,6 +568,7 @@ struct arm_smmu_cd_table {

>  struct arm_smmu_s1_cfg {

>  	struct arm_smmu_cd_table	table;

>  	struct arm_smmu_ctx_desc	cd;

> +	u8				s1cdmax;

>  };

>  

>  struct arm_smmu_s2_cfg {

> @@ -1455,6 +1456,31 @@ static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu)

>  }

>  

>  /* Context descriptor manipulation functions */

> +static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu,

> +					struct arm_smmu_cd_table *table,

> +					size_t num_entries)

> +{

> +	size_t size = num_entries * (CTXDESC_CD_DWORDS << 3);

> +

> +	table->ptr = dmam_alloc_coherent(smmu->dev, size, &table->ptr_dma,

> +					 GFP_KERNEL);

> +	if (!table->ptr) {

> +		dev_warn(smmu->dev,

> +			 "failed to allocate context descriptor table\n");

> +		return -ENOMEM;

> +	}

> +	return 0;

> +}

> +

> +static void arm_smmu_free_cd_leaf_table(struct arm_smmu_device *smmu,

> +					struct arm_smmu_cd_table *table,

> +					size_t num_entries)

> +{

> +	size_t size = num_entries * (CTXDESC_CD_DWORDS << 3);

> +

> +	dmam_free_coherent(smmu->dev, size, table->ptr, table->ptr_dma);

> +}

> +

>  static u64 arm_smmu_cpu_tcr_to_cd(u64 tcr)

>  {

>  	u64 val = 0;

> @@ -1502,6 +1528,23 @@ static void arm_smmu_write_ctx_desc(struct arm_smmu_device *smmu,

>  	cdptr[3] = cpu_to_le64(cfg->cd.mair);

>  }

>  

> +static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain)

> +{

> +	struct arm_smmu_device *smmu = smmu_domain->smmu;

> +	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

> +

> +	return arm_smmu_alloc_cd_leaf_table(smmu, &cfg->table,

> +					    1 << cfg->s1cdmax);

> +}

> +

> +static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain)

> +{

> +	struct arm_smmu_device *smmu = smmu_domain->smmu;

> +	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

> +

> +	arm_smmu_free_cd_leaf_table(smmu, &cfg->table, 1 << cfg->s1cdmax);

> +}

> +

>  /* Stream table manipulation functions */

>  static void

>  arm_smmu_write_strtab_l1_desc(__le64 *dst, struct arm_smmu_strtab_l1_desc *desc)

> @@ -2145,11 +2188,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain)

>  		struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

>  

>  		if (cfg->table.ptr) {

> -			dmam_free_coherent(smmu_domain->smmu->dev,

> -					   CTXDESC_CD_DWORDS << 3,

> -					   cfg->table.ptr,

> -					   cfg->table.ptr_dma);

> -

> +			arm_smmu_free_cd_tables(smmu_domain);

>  			arm_smmu_bitmap_free(smmu->asid_map, cfg->cd.asid);

>  		}

>  	} else {

> @@ -2173,13 +2212,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,

>  	if (asid < 0)

>  		return asid;

>  

> -	cfg->table.ptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_DWORDS << 3,

> -					     &cfg->table.ptr_dma, GFP_KERNEL);

> -	if (!cfg->table.ptr) {

> -		dev_warn(smmu->dev, "failed to allocate context descriptor\n");

> -		ret = -ENOMEM;

> +	ret = arm_smmu_alloc_cd_tables(smmu_domain);

> +	if (ret)

>  		goto out_free_asid;

> -	}

>  

>  	cfg->cd.asid	= (u16)asid;

>  	cfg->cd.ttbr	= pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0];

>
diff mbox series

Patch

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index b287e303b1d7..43d6a7ded6e4 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -568,6 +568,7 @@  struct arm_smmu_cd_table {
 struct arm_smmu_s1_cfg {
 	struct arm_smmu_cd_table	table;
 	struct arm_smmu_ctx_desc	cd;
+	u8				s1cdmax;
 };
 
 struct arm_smmu_s2_cfg {
@@ -1455,6 +1456,31 @@  static int arm_smmu_cmdq_issue_sync(struct arm_smmu_device *smmu)
 }
 
 /* Context descriptor manipulation functions */
+static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu,
+					struct arm_smmu_cd_table *table,
+					size_t num_entries)
+{
+	size_t size = num_entries * (CTXDESC_CD_DWORDS << 3);
+
+	table->ptr = dmam_alloc_coherent(smmu->dev, size, &table->ptr_dma,
+					 GFP_KERNEL);
+	if (!table->ptr) {
+		dev_warn(smmu->dev,
+			 "failed to allocate context descriptor table\n");
+		return -ENOMEM;
+	}
+	return 0;
+}
+
+static void arm_smmu_free_cd_leaf_table(struct arm_smmu_device *smmu,
+					struct arm_smmu_cd_table *table,
+					size_t num_entries)
+{
+	size_t size = num_entries * (CTXDESC_CD_DWORDS << 3);
+
+	dmam_free_coherent(smmu->dev, size, table->ptr, table->ptr_dma);
+}
+
 static u64 arm_smmu_cpu_tcr_to_cd(u64 tcr)
 {
 	u64 val = 0;
@@ -1502,6 +1528,23 @@  static void arm_smmu_write_ctx_desc(struct arm_smmu_device *smmu,
 	cdptr[3] = cpu_to_le64(cfg->cd.mair);
 }
 
+static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain)
+{
+	struct arm_smmu_device *smmu = smmu_domain->smmu;
+	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
+
+	return arm_smmu_alloc_cd_leaf_table(smmu, &cfg->table,
+					    1 << cfg->s1cdmax);
+}
+
+static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain)
+{
+	struct arm_smmu_device *smmu = smmu_domain->smmu;
+	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
+
+	arm_smmu_free_cd_leaf_table(smmu, &cfg->table, 1 << cfg->s1cdmax);
+}
+
 /* Stream table manipulation functions */
 static void
 arm_smmu_write_strtab_l1_desc(__le64 *dst, struct arm_smmu_strtab_l1_desc *desc)
@@ -2145,11 +2188,7 @@  static void arm_smmu_domain_free(struct iommu_domain *domain)
 		struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;
 
 		if (cfg->table.ptr) {
-			dmam_free_coherent(smmu_domain->smmu->dev,
-					   CTXDESC_CD_DWORDS << 3,
-					   cfg->table.ptr,
-					   cfg->table.ptr_dma);
-
+			arm_smmu_free_cd_tables(smmu_domain);
 			arm_smmu_bitmap_free(smmu->asid_map, cfg->cd.asid);
 		}
 	} else {
@@ -2173,13 +2212,9 @@  static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
 	if (asid < 0)
 		return asid;
 
-	cfg->table.ptr = dmam_alloc_coherent(smmu->dev, CTXDESC_CD_DWORDS << 3,
-					     &cfg->table.ptr_dma, GFP_KERNEL);
-	if (!cfg->table.ptr) {
-		dev_warn(smmu->dev, "failed to allocate context descriptor\n");
-		ret = -ENOMEM;
+	ret = arm_smmu_alloc_cd_tables(smmu_domain);
+	if (ret)
 		goto out_free_asid;
-	}
 
 	cfg->cd.asid	= (u16)asid;
 	cfg->cd.ttbr	= pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0];