| Message ID | 1377288624-7418-3-git-send-email-christoffer.dall@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 23.08.2013, at 21:10, Christoffer Dall wrote: > To make the code slightly cleaner to look at and make the save/restore > code easier to understand, introduce this macro to set the priority of > interrupts. > > Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> > --- > hw/intc/arm_gic.c | 6 +----- > hw/intc/gic_internal.h | 6 ++++++ > 2 files changed, 7 insertions(+), 5 deletions(-) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index bff3f9e..a7bb528 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, > irq = (offset - 0x400) + GIC_BASE_IRQ; > if (irq >= s->num_irq) > goto bad_reg; > - if (irq < GIC_INTERNAL) { > - s->priority1[irq][cpu] = value; > - } else { > - s->priority2[irq - GIC_INTERNAL] = value; > - } > + GIC_SET_PRIORITY(irq, cpu, value); > } else if (offset < 0xc00) { > /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the > * annoying exception of the 11MPCore's GIC. > diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h > index 1426437..d835aa1 100644 > --- a/hw/intc/gic_internal.h > +++ b/hw/intc/gic_internal.h > @@ -57,6 +57,12 @@ > #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \ > s->priority1[irq][cpu] : \ > s->priority2[(irq) - GIC_INTERNAL]) > +#define GIC_SET_PRIORITY(irq, cpu, val) do { \ > + uint8_t *__x = ((irq) < GIC_INTERNAL) ? \ > + &s->priority1[irq][cpu] : \ > + &s->priority2[(irq) - GIC_INTERNAL]; \ > + *__x = val; \ > +} while (0) Why not make this a function? Alex > #define GIC_TARGET(irq) s->irq_target[irq] > > typedef struct gic_irq_state { > -- > 1.7.10.4 > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
On Sun, Aug 25, 2013 at 04:37:44PM +0100, Alexander Graf wrote: > > On 23.08.2013, at 21:10, Christoffer Dall wrote: > > > To make the code slightly cleaner to look at and make the save/restore > > code easier to understand, introduce this macro to set the priority of > > interrupts. > > > > Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> > > --- > > hw/intc/arm_gic.c | 6 +----- > > hw/intc/gic_internal.h | 6 ++++++ > > 2 files changed, 7 insertions(+), 5 deletions(-) > > > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > > index bff3f9e..a7bb528 100644 > > --- a/hw/intc/arm_gic.c > > +++ b/hw/intc/arm_gic.c > > @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, > > irq = (offset - 0x400) + GIC_BASE_IRQ; > > if (irq >= s->num_irq) > > goto bad_reg; > > - if (irq < GIC_INTERNAL) { > > - s->priority1[irq][cpu] = value; > > - } else { > > - s->priority2[irq - GIC_INTERNAL] = value; > > - } > > + GIC_SET_PRIORITY(irq, cpu, value); > > } else if (offset < 0xc00) { > > /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the > > * annoying exception of the 11MPCore's GIC. > > diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h > > index 1426437..d835aa1 100644 > > --- a/hw/intc/gic_internal.h > > +++ b/hw/intc/gic_internal.h > > @@ -57,6 +57,12 @@ > > #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \ > > s->priority1[irq][cpu] : \ > > s->priority2[(irq) - GIC_INTERNAL]) > > +#define GIC_SET_PRIORITY(irq, cpu, val) do { \ > > + uint8_t *__x = ((irq) < GIC_INTERNAL) ? \ > > + &s->priority1[irq][cpu] : \ > > + &s->priority2[(irq) - GIC_INTERNAL]; \ > > + *__x = val; \ > > +} while (0) > > Why not make this a function? > Ah, you're no fun anymore. ok. -Christoffer
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index bff3f9e..a7bb528 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x400) + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; - if (irq < GIC_INTERNAL) { - s->priority1[irq][cpu] = value; - } else { - s->priority2[irq - GIC_INTERNAL] = value; - } + GIC_SET_PRIORITY(irq, cpu, value); } else if (offset < 0xc00) { /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the * annoying exception of the 11MPCore's GIC. diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 1426437..d835aa1 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -57,6 +57,12 @@ #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \ s->priority1[irq][cpu] : \ s->priority2[(irq) - GIC_INTERNAL]) +#define GIC_SET_PRIORITY(irq, cpu, val) do { \ + uint8_t *__x = ((irq) < GIC_INTERNAL) ? \ + &s->priority1[irq][cpu] : \ + &s->priority2[(irq) - GIC_INTERNAL]; \ + *__x = val; \ +} while (0) #define GIC_TARGET(irq) s->irq_target[irq] typedef struct gic_irq_state {
To make the code slightly cleaner to look at and make the save/restore code easier to understand, introduce this macro to set the priority of interrupts. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> --- hw/intc/arm_gic.c | 6 +----- hw/intc/gic_internal.h | 6 ++++++ 2 files changed, 7 insertions(+), 5 deletions(-)