@@ -168,6 +168,7 @@ properties:
- emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base
- fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board
- fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board
+ - prt,prtrvt # Protonic RVT board
- prt,prtvt7 # Protonic VT7 board
- technologic,imx6dl-ts4900
- technologic,imx6dl-ts7970
@@ -446,6 +446,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-mira-rdk-nand.dtb \
imx6dl-phytec-pbab01.dtb \
+ imx6dl-prtrvt.dtb \
imx6dl-prtvt7.dtb \
imx6dl-rex-basic.dtb \
imx6dl-riotboard.dtb \
new file mode 100644
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2014 Protonic Holland
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-prti6q.dtsi"
+
+/ {
+ model = "Protonic RVT board";
+ compatible = "prt,prtrvt", "fsl,imx6dl";
+
+ memory@10000000 {
+ device_type = "memory";
+ reg = <0x10000000 0x10000000>;
+ };
+};
+
+&iomuxc {
+ prti6q {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* SGTL5000 sys_mclk */
+ MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
+ /* CAN1_SR + CAN2_SR GPIO outputs */
+ MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070
+ MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13070
+
+ /* CAN1_TERM */
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
+ /* ITU656_nRESET */
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+
+ /* HW revision detect */
+ /* REV_ID0 */
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ /* REV_ID1 */
+ MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
+ /* REV_ID2 */
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
+ /* REV_ID3 */
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ /* REV_ID4 */
+ MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
+ >;
+ };
+
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ /* DEBUG0 */
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ /* Not connected */
+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
+ /* power enable, high active */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
+ >;
+ };
+ };
+};
+
+&i2c3 {
+ rtc: pcf8563@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+};
+
+&pwm1 {
+ status = "disabled";
+};
+
+&ssi1 {
+ status = "disabled";
+};
+
+&uart2 {
+ status = "disabled";
+};
+
+&uart5 {
+ status = "disabled";
+};
+
+&usbh1 {
+ status = "disabled";
+};
+
+&can2 {
+ status = "disabled";
+};
+
+&vpu {
+ status = "disabled";
+};
+
+&audmux {
+ status = "disabled";
+};
+
+&ipu1 {
+ status = "disabled";
+};