diff mbox series

[v2] dt-bindings: tpm: Convert cr50 binding to YAML

Message ID 20200202043949.213427-1-swboyd@chromium.org
State New
Headers show
Series [v2] dt-bindings: tpm: Convert cr50 binding to YAML | expand

Commit Message

Stephen Boyd Feb. 2, 2020, 4:39 a.m. UTC 
This allows us to validate the dt binding to the implementation. Add the
interrupt property too, because that's required but nobody noticed when
the non-YAML binding was introduced.

Cc: Andrey Pronin <apronin@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---

Changes from v1:
 * Dropped spi-max-frequency as required
 * Capped spi-max-frequency at 1MHz
 * Added interrupt-parent to example to be realistic

 .../bindings/security/tpm/google,cr50.txt     | 19 -------
 .../bindings/security/tpm/google,cr50.yaml    | 50 +++++++++++++++++++
 2 files changed, 50 insertions(+), 19 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/security/tpm/google,cr50.txt
 create mode 100644 Documentation/devicetree/bindings/security/tpm/google,cr50.yaml
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/security/tpm/google,cr50.txt b/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
deleted file mode 100644
index cd69c2efdd37..000000000000
--- a/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
+++ /dev/null
@@ -1,19 +0,0 @@ 
-* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
-
-H1 Secure Microcontroller running Cr50 firmware provides several
-functions, including TPM-like functionality. It communicates over
-SPI using the FIFO protocol described in the PTP Spec, section 6.
-
-Required properties:
-- compatible: Should be "google,cr50".
-- spi-max-frequency: Maximum SPI frequency.
-
-Example:
-
-&spi0 {
-	tpm@0 {
-		compatible = "google,cr50";
-		reg = <0>;
-		spi-max-frequency = <800000>;
-	};
-};
diff --git a/Documentation/devicetree/bindings/security/tpm/google,cr50.yaml b/Documentation/devicetree/bindings/security/tpm/google,cr50.yaml
new file mode 100644
index 000000000000..31a5b0740a7a
--- /dev/null
+++ b/Documentation/devicetree/bindings/security/tpm/google,cr50.yaml
@@ -0,0 +1,50 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/tpm/google,cr50.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: H1 Secure Microcontroller with Cr50 Firmware on SPI Bus
+
+description:
+  H1 Secure Microcontroller running Cr50 firmware provides several functions,
+  including TPM-like functionality. It communicates over SPI using the FIFO
+  protocol described in the PTP Spec, section 6.
+
+maintainers:
+  - Andrey Pronin <apronin@chromium.org>
+
+properties:
+  compatible:
+    const: google,cr50
+
+  reg: true
+
+  spi-max-frequency:
+    maximum: 1000000
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    spi {
+      #address-cells = <0x1>;
+      #size-cells = <0x0>;
+      tpm@0 {
+          compatible = "google,cr50";
+          reg = <0>;
+          spi-max-frequency = <1000000>;
+          interrupt-parent = <&gpio_controller>;
+          interrupts = <50 IRQ_TYPE_EDGE_RISING>;
+      };
+    };
+...