Message ID | 1390908155-23475-3-git-send-email-will.newton@linaro.org |
---|---|
State | Accepted |
Headers | show |
diff --git a/target-arm/translate.c b/target-arm/translate.c index 2db6812..2b3157c 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3379,6 +3379,17 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) gen_vfp_F1_ld0(dp); gen_vfp_cmpe(dp); break; + case 12: /* vrintr */ + { + TCGv_ptr fpst = get_fpstatus_ptr(0); + if (dp) { + gen_helper_rintd(cpu_F0d, cpu_F0d, fpst); + } else { + gen_helper_rints(cpu_F0s, cpu_F0s, fpst); + } + tcg_temp_free_ptr(fpst); + break; + } case 15: /* single<->double conversion */ if (dp) gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env);
Add support for the AArch32 floating-point VRINTR instruction. Signed-off-by: Will Newton <will.newton@linaro.org> --- target-arm/translate.c | 11 +++++++++++ 1 file changed, 11 insertions(+) Changes in v2: - Move code outside the arms of the if