diff mbox series

[PATCHv2,05/10] pci_ep: layerscape: Add the workaround for errata A-009460

Message ID 20200709153142.3644-6-Zhiqiang.Hou@nxp.com
State New
Headers show
Series pci: layerscape: Split EP mode code into a | expand

Commit Message

Zhiqiang Hou July 9, 2020, 3:31 p.m. UTC 
From: Xiaowei Bao <xiaowei.bao at nxp.com>

The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.

Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
V2:
 - Rebase the patch without change intent.

 drivers/pci/pcie_layerscape_ep.c | 9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index e609607c3a..3f22c5ef7a 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -164,6 +164,15 @@  static void ls_pcie_setup_ep(struct ls_pcie_ep *pcie_ep)
 	if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) {
 		pcie_ep->sriov_flag = 1;
 		for (pf = 0; pf < PCIE_PF_NUM; pf++) {
+			/*
+			 * The VF_BARn_REG register's Prefetchable and Type bit
+			 * fields are overwritten by a write to VF's BAR Mask
+			 * register. Before writing to the VF_BARn_MASK_REG
+			 * register, write 0b to the PCIE_MISC_CONTROL_1_OFF
+			 * register.
+			 */
+			writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
+
 			if (pcie_ep->cfg2_flag) {
 				for (vf = 0; vf <= PCIE_VF_NUM; vf++) {
 					ctrl_writel(pcie,