diff mbox series

[v4,06/15] board: ns3: default reset type to L3

Message ID 20200710085220.32730-7-rayagonda.kokatanur@broadcom.com
State Superseded
Headers show
Series add initial support for broadcom NS3 soc | expand

Commit Message

Rayagonda Kokatanur July 10, 2020, 8:52 a.m. UTC
Default "reset" from U-Boot to L3 reset.
"reset" command with argument will trigger L1 reset.

Signed-off-by: Rajesh Ravi <rajesh.ravi at broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
---
Changes from v3:
  -Address review comments from Simon,
   Update commit message ie change u-boot to U-Boot

 board/broadcom/bcmns3/ns3.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

Comments

Simon Glass July 15, 2020, 1:05 a.m. UTC | #1
On Fri, 10 Jul 2020 at 02:53, Rayagonda Kokatanur
<rayagonda.kokatanur at broadcom.com> wrote:
>
> Default "reset" from U-Boot to L3 reset.
> "reset" command with argument will trigger L1 reset.
>
> Signed-off-by: Rajesh Ravi <rajesh.ravi at broadcom.com>
> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com>
> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> ---
> Changes from v3:
>   -Address review comments from Simon,
>    Update commit message ie change u-boot to U-Boot
>
>  board/broadcom/bcmns3/ns3.c | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

See below

> diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
> index 5e644bd466..1221f26ddc 100644
> --- a/board/broadcom/bcmns3/ns3.c
> +++ b/board/broadcom/bcmns3/ns3.c
> @@ -68,7 +68,23 @@ int dram_init_banksize(void)
>         return 0;
>  }
>
> -void reset_cpu(ulong addr)
> +void reset_cpu(ulong level)
>  {
> -       psci_system_reset();
> +#define L3_RESET 30

Put this at top of file and add a comment about what the value means.

> +       u32 reset_level, strap_val;
> +
> +       /* Default reset type is L3 reset */
> +       if (!level) {
> +               /*
> +                * Encoding: u-boot reset command expects decimal argument

U-Boot


> +                * strap val = 1st decimal digit;reset level = 2nd decimal digit
> +                */
> +               strap_val = L3_RESET % 10;
> +               level = L3_RESET / 10;
> +               reset_level = level % 10;
> +               psci_system_reset2(reset_level, strap_val);
> +       } else {
> +               /* U-boot cmd "reset" with any arg will trigger L1 reset */
> +               psci_system_reset();
> +       }
>  }
> --
> 2.17.1
>
diff mbox series

Patch

diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 5e644bd466..1221f26ddc 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -68,7 +68,23 @@  int dram_init_banksize(void)
 	return 0;
 }
 
-void reset_cpu(ulong addr)
+void reset_cpu(ulong level)
 {
-	psci_system_reset();
+#define L3_RESET 30
+	u32 reset_level, strap_val;
+
+	/* Default reset type is L3 reset */
+	if (!level) {
+		/*
+		 * Encoding: u-boot reset command expects decimal argument
+		 * strap val = 1st decimal digit;reset level = 2nd decimal digit
+		 */
+		strap_val = L3_RESET % 10;
+		level = L3_RESET / 10;
+		reset_level = level % 10;
+		psci_system_reset2(reset_level, strap_val);
+	} else {
+		/* U-boot cmd "reset" with any arg will trigger L1 reset */
+		psci_system_reset();
+	}
 }