diff mbox series

[v2,5/9] arm: stm32mp: add weak function to save vddcore

Message ID 20200525101949.15944-6-patrick.delaunay@st.com
State New
Headers show
Series stm32mp1: use OPP information for PLL1 settings in SPL | expand

Commit Message

Patrick Delaunay May 25, 2020, 10:19 a.m. UTC 
Add a weak functions to save the vddcore voltage value provided
in the OPP node when the clock tree is initialized.

Signed-off-by: Patrick Delaunay <patrick.delaunay at st.com>
Reviewed-by: Patrice Chotard <patrice.chotard at st.com>
---

Changes in v2: None

 arch/arm/mach-stm32mp/include/mach/sys_proto.h | 3 +++
 drivers/clk/clk_stm32mp1.c                     | 5 +++++
 2 files changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 4b6c7b8bdd..4149d3a133 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -48,3 +48,6 @@  void get_soc_name(char name[SOC_NAME_SIZE]);
 u32 get_bootmode(void);
 
 int setup_mac_address(void);
+
+/* board power management : configure vddcore according OPP */
+void board_vddcore_init(u32 voltage_mv);
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index b48c835bc3..d1177fc3af 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -1226,6 +1226,10 @@  bool stm32mp1_supports_opp(u32 opp_id, u32 cpu_type)
 	}
 }
 
+__weak void board_vddcore_init(u32 voltage_mv)
+{
+}
+
 /*
  * gets OPP parameters (frequency in KHz and voltage in mV) from
  * an OPP table subnode. Platform HW support capabilities are also checked.
@@ -1303,6 +1307,7 @@  int stm32mp1_get_max_opp_freq(struct stm32mp1_clk_priv *priv, u64 *freq_hz)
 		return -FDT_ERR_NOTFOUND;
 
 	*freq_hz = (u64)1000U * freq;
+	board_vddcore_init(voltage);
 
 	return 0;
 }