@@ -21,6 +21,7 @@
#define MIPS_CPS_H
#include "hw/sysbus.h"
+#include "hw/clock.h"
#include "hw/misc/mips_cmgcr.h"
#include "hw/intc/mips_gic.h"
#include "hw/misc/mips_cpc.h"
@@ -43,6 +44,7 @@ struct MIPSCPSState {
MIPSGICState gic;
MIPSCPCState cpc;
MIPSITUState itu;
+ Clock *clock;
};
qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
@@ -22,6 +22,7 @@
#include "qemu/module.h"
#include "hw/mips/cps.h"
#include "hw/mips/mips.h"
+#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
#include "hw/mips/cpudevs.h"
#include "sysemu/kvm.h"
@@ -38,6 +39,7 @@ static void mips_cps_init(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
MIPSCPSState *s = MIPS_CPS(obj);
+ s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL);
/*
* Cover entire address space as there do not seem to be any
* constraints for the base address of CPC and GIC.
@@ -80,6 +82,8 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
errp)) {
return;
}
+ /* All cores use the same clock tree */
+ qdev_connect_clock_in(DEVICE(cpu), "clk-in", s->clock);
if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) {
return;
Expose a qdev input clock named 'clk-in', and connect it to each core to forward-propagate the clock. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-18-f4bug@amsat.org> --- include/hw/mips/cps.h | 2 ++ hw/mips/cps.c | 4 ++++ 2 files changed, 6 insertions(+)