Message ID | 1396339430-21084-4-git-send-email-haojian.zhuang@linaro.org |
---|---|
State | Changes Requested |
Headers | show
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[2001:770:15f::2]) by mx.google.com with ESMTPS id wx5si4531362wjb.53.2014.04.01.01.08.14 for <patch@linaro.org> (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Apr 2014 01:08:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:770:15f::2 as permitted sender) client-ip=2001:770:15f::2; Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUth9-0000tU-Qc; Tue, 01 Apr 2014 08:05:20 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUtgs-00027U-7K; Tue, 01 Apr 2014 08:05:02 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WUtgo-00024f-1w for linux-arm-kernel@lists.infradead.org; Tue, 01 Apr 2014 08:04:59 +0000 Received: by mail-pb0-f49.google.com with SMTP id jt11so9451426pbb.36 for <linux-arm-kernel@lists.infradead.org>; Tue, 01 Apr 2014 01:04:36 -0700 (PDT) X-Received: by 10.66.176.143 with SMTP id ci15mr30086985pac.35.1396339476544; Tue, 01 Apr 2014 01:04:36 -0700 (PDT) Received: from localhost.localdomain ([140.206.182.114]) by mx.google.com with ESMTPSA id yo9sm52327508pab.16.2014.04.01.01.04.28 for <multiple recipients> (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 01 Apr 2014 01:04:36 -0700 (PDT) From: Haojian Zhuang <haojian.zhuang@linaro.org> To: tglx@linutronix.de, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, xuwei5@hisilicon.com Subject: [PATCH v1 3/8] irq: gic: use mask field in GICC_IAR Date: Tue, 1 Apr 2014 16:03:45 +0800 Message-Id: <1396339430-21084-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1396339430-21084-1-git-send-email-haojian.zhuang@linaro.org> References: <1396339430-21084-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140401_040458_195997_89574FC8 X-CRM114-Status: GOOD ( 11.52 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang <haojian.zhuang@linaro.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: <patchwork-forward.linaro.org> List-Unsubscribe: <http://groups.google.com/a/linaro.org/group/patchwork-forward/subscribe>, <mailto:googlegroups-manage+836684582541+unsubscribe@googlegroups.com> List-Archive: <http://groups.google.com/a/linaro.org/group/patchwork-forward/> List-Post: <http://groups.google.com/a/linaro.org/group/patchwork-forward/post>, <mailto:patchwork-forward@linaro.org> List-Help: <http://support.google.com/a/linaro.org/bin/topic.py?topic=25838>, <mailto:patchwork-forward+help@linaro.org> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> MIME-Version: 1.0 Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4300b66..8fd27bf 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -287,7 +287,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); - irqnr = irqstat & ~0x1c00; + irqnr = irqstat & GICC_IAR_INTID; if (likely(irqnr > 15 && irqnr < 1021)) { irqnr = irq_find_mapping(gic->domain, irqnr); diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 7ed92d0..55933aa 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -21,6 +21,8 @@ #define GIC_CPU_ACTIVEPRIO 0xd0 #define GIC_CPU_IDENT 0xfc +#define GICC_IAR_INTID 0x3ff + #define GIC_DIST_CTRL 0x000 #define GIC_DIST_CTR 0x004 #define GIC_DIST_IGROUP 0x080
Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field, and others are reserved. So we should use GICC_IAR_INTID to get interrupt ID. It's not a good way to use ~0x1c00 (CPU ID field) to get interrupt ID. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> --- drivers/irqchip/irq-gic.c | 2 +- include/linux/irqchip/arm-gic.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-)