Message ID | 1396944052-9887-12-git-send-email-haojian.zhuang@linaro.org |
---|---|
State | Changes Requested |
Headers | show
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[2001:770:15f::2]) by mx.google.com with ESMTPS id la10si1152040wjb.31.2014.04.08.10.07.30 for <patch@linaro.org> (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Apr 2014 10:07:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:770:15f::2 as permitted sender) client-ip=2001:770:15f::2; Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXXh4-0005EM-8x; Tue, 08 Apr 2014 15:12:11 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXXgM-0003bS-QN; Tue, 08 Apr 2014 15:11:26 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXXfV-0003ED-IR for linux-arm-kernel@merlin.infradead.org; Tue, 08 Apr 2014 15:10:33 +0000 Received: from mail-pb0-f53.google.com ([209.85.160.53]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXR5f-00022H-Gf for linux-arm-kernel@lists.infradead.org; Tue, 08 Apr 2014 08:09:08 +0000 Received: by mail-pb0-f53.google.com with SMTP id rp16so679819pbb.26 for <linux-arm-kernel@lists.infradead.org>; Tue, 08 Apr 2014 01:08:40 -0700 (PDT) X-Received: by 10.66.240.70 with SMTP id vy6mr2794532pac.80.1396944121407; Tue, 08 Apr 2014 01:02:01 -0700 (PDT) Received: from localhost.localdomain ([162.243.130.63]) by mx.google.com with ESMTPSA id it4sm2764630pbd.48.2014.04.08.01.01.57 for <multiple recipients> (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 08 Apr 2014 01:02:00 -0700 (PDT) From: Haojian Zhuang <haojian.zhuang@linaro.org> To: linux-arm-kernel@lists.infradead.org, tglx@linutronix.de, linux@arm.linux.org.uk, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, xuwei5@hisilicon.com Subject: [PATCH v2 11/12] ARM: hisi: enable erratum 798181 of A15 on HiP04 Date: Tue, 8 Apr 2014 16:00:51 +0800 Message-Id: <1396944052-9887-12-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1396944052-9887-1-git-send-email-haojian.zhuang@linaro.org> References: <1396944052-9887-1-git-send-email-haojian.zhuang@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140408_090907_699454_66A27A65 X-CRM114-Status: UNSURE ( 9.85 ) X-CRM114-Notice: Please train this message. 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diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index 4dd966a..c976bdb 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -21,6 +21,7 @@ config ARCH_HI3xxx config ARCH_HIP04 bool "Hisilicon HiP04 Cortex A15 family" if ARCH_MULTI_V7_LPAE + select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select MCPM if SMP help