diff mbox

[v6,36/37] target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pc

Message ID 1397146536-30116-37-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell April 10, 2014, 4:15 p.m. UTC
The AArch64 implementation of the set_pc method needs to be updated to
handle the possibility that the CPU is in AArch32 mode; otherwise there
are weird crashes when doing interprocessing in system emulation mode
when an interrupt occurs and we fail to resynchronize the 32-bit PC
with the TB we need to execute next.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
 target-arm/cpu64.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Peter Crosthwaite April 14, 2014, 6:36 a.m. UTC | #1
On Fri, Apr 11, 2014 at 2:15 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> The AArch64 implementation of the set_pc method needs to be updated to
> handle the possibility that the CPU is in AArch32 mode; otherwise there
> are weird crashes when doing interprocessing in system emulation mode
> when an interrupt occurs and we fail to resynchronize the 32-bit PC
> with the TB we need to execute next.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

> ---
>  target-arm/cpu64.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
> index 9a0c431..c673ac2 100644
> --- a/target-arm/cpu64.c
> +++ b/target-arm/cpu64.c
> @@ -172,11 +172,15 @@ static void aarch64_cpu_finalizefn(Object *obj)
>  static void aarch64_cpu_set_pc(CPUState *cs, vaddr value)
>  {
>      ARMCPU *cpu = ARM_CPU(cs);
> -    /*
> -     * TODO: this will need updating for system emulation,
> -     * when the core may be in AArch32 mode.
> +    /* It's OK to look at env for the current mode here, because it's
> +     * never possible for an AArch64 TB to chain to an AArch32 TB.
> +     * (Otherwise we would need to use synchronize_from_tb instead.)
>       */
> -    cpu->env.pc = value;
> +    if (is_a64(&cpu->env)) {
> +        cpu->env.pc = value;
> +    } else {
> +        cpu->env.regs[15] = value;
> +    }
>  }
>
>  static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
> --
> 1.9.1
>
>
diff mbox

Patch

diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index 9a0c431..c673ac2 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -172,11 +172,15 @@  static void aarch64_cpu_finalizefn(Object *obj)
 static void aarch64_cpu_set_pc(CPUState *cs, vaddr value)
 {
     ARMCPU *cpu = ARM_CPU(cs);
-    /*
-     * TODO: this will need updating for system emulation,
-     * when the core may be in AArch32 mode.
+    /* It's OK to look at env for the current mode here, because it's
+     * never possible for an AArch64 TB to chain to an AArch32 TB.
+     * (Otherwise we would need to use synchronize_from_tb instead.)
      */
-    cpu->env.pc = value;
+    if (is_a64(&cpu->env)) {
+        cpu->env.pc = value;
+    } else {
+        cpu->env.regs[15] = value;
+    }
 }
 
 static void aarch64_cpu_class_init(ObjectClass *oc, void *data)