@@ -6216,6 +6216,42 @@ A typical @code{ctrap} pattern looks like
"@dots{}")
@end smallexample
+@cindex @code{ccmp} instruction pattern
+@item @samp{ccmp}
+Conditional compare instruction. Operand 2 and 5 are RTLs which perform
+two comparisons. Operand 1 is AND or IOR, which operates on the result of
+operand 2 and 5.
+It uses recursive method to support more than two compares. e.g.
+
+ CC0 = CMP (a, b);
+ CC1 = CCMP (NE (CC0, 0), CMP (e, f));
+ ...
+ CCn = CCMP (NE (CCn-1, 0), CMP (...));
+
+Two target hooks are used to generate conditional compares. GEN_CCMP_FISRT
+is used to generate the first CMP. And GEN_CCMP_NEXT is used to generate the
+following CCMPs. Operand 1 is AND or IOR. Operand 3 is the result of
+GEN_CCMP_FISRT or a previous GEN_CCMP_NEXT. Operand 2 is NE.
+Operand 4, 5 and 6 is another compare expression.
+
+A typical CCMP pattern looks like
+
+@smallexample
+(define_insn "*ccmp_and_ior"
+ [(set (match_operand 0 "dominant_cc_register" "")
+ (compare
+ (match_operator 1
+ (match_operator 2 "comparison_operator"
+ [(match_operand 3 "dominant_cc_register")
+ (const_int 0)])
+ (match_operator 4 "comparison_operator"
+ [(match_operand 5 "register_operand")
+ (match_operand 6 "compare_operand"]))
+ (const_int 0)))]
+ ""
+ "@dots{}")
+@end smallexample
+
@cindex @code{prefetch} instruction pattern
@item @samp{prefetch}
@@ -11021,6 +11021,23 @@ This target hook is required only when the
target has several different
modes and they have different conditional execution capability, such as ARM.
@end deftypefn
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code},
rtx @var{op0}, rtx @var{op1})
+This function emits a comparison insn for the first of a sequence of
+ conditional comparisions. It returns a comparison expression appropriate
+ for passing to @code{gen_ccmp_next} or to @code{cbranch_optab}.
+ @code{unsignedp} is used when converting @code{op0} and @code{op1}'s mode.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev},
int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
+This function emits a conditional comparison within a sequence of
+ conditional comparisons. The @code{prev} expression is the result of a
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return
+ @code{NULL} if the combination of @code{prev} and this comparison is
+ not supported, otherwise the result must be appropriate for passing to
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @code{bit_code}
+ is AND or IOR, which is the op on the two compares.
+@end deftypefn
+
@deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned
@var{nunroll}, struct loop *@var{loop})
This target hook returns a new value for the number of times @var{loop}
should be unrolled. The parameter @var{nunroll} is the number of times
@@ -8107,6 +8107,10 @@ build_type_attribute_variant (@var{mdecl},
@hook TARGET_HAVE_CONDITIONAL_EXECUTION
+@hook TARGET_GEN_CCMP_FIRST
+
+@hook TARGET_GEN_CCMP_NEXT
+
@hook TARGET_LOOP_UNROLL_ADJUST
@defmac POWI_MAX_MULTS
@@ -2320,6 +2320,27 @@ modes and they have different conditional
execution capability, such as ARM.",
bool, (void),
default_have_conditional_execution)
+DEFHOOK
+(gen_ccmp_first,
+ "This function emits a comparison insn for the first of a sequence of\n\
+ conditional comparisions. It returns a comparison expression appropriate\n\
+ for passing to @code{gen_ccmp_next} or to @code{cbranch_optab}.\n\
+ @code{unsignedp} is used when converting @code{op0} and @code{op1}'s mode.",
+ rtx, (int code, rtx op0, rtx op1),
+ NULL)
+
+DEFHOOK
+(gen_ccmp_next,
+ "This function emits a conditional comparison within a sequence of\n\
+ conditional comparisons. The @code{prev} expression is the result of a\n\:q
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return\n\
+ @code{NULL} if the combination of @code{prev} and this comparison is\n\
+ not supported, otherwise the result must be appropriate for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @code{bit_code}\n\
+ is AND or IOR, which is the op on the two compares.",
+ rtx, (rtx prev, int cmp_code, rtx op0, rtx op1, int bit_code),
+ NULL)
+
/* Return a new value for loop unroll size. */
DEFHOOK
Hi, The patch adds two hooks for backends to generate conditional compare instructions. * gen_ccmp_first is for the first compare. * gen_ccmp_next is for for the following compares. The patch is separated from https://gcc.gnu.org/ml/gcc-patches/2014-02/msg01407.html. And the original discussion about the hooks was in thread: https://gcc.gnu.org/ml/gcc-patches/2013-10/msg02601.html OK for trunk? Thanks! -Zhenqiang ChangeLog: 2014-06-23 Zhenqiang Chen <zhenqiang.chen@linaro.org> * doc/md.texi (ccmp): Add description about conditional compare instruction pattern. (TARGET_GEN_CCMP_FIRST): Define. (TARGET_GEN_CCMP_NEXT): Define. * doc/tm.texi.in (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New. * target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks. (loop_unroll_adjust,