diff mbox series

[v2,10/19] ARM: dts: sun8i: v3s: Add CSI1 controller port for parallel input

Message ID 20201128142839.517949-11-paul.kocialkowski@bootlin.com
State New
Headers show
Series Allwinner MIPI CSI-2 support for A31/V3s/A83T | expand

Commit Message

Paul Kocialkowski Nov. 28, 2020, 2:28 p.m. UTC 
Since the CSI controller binding is getting a bit more complex due
to the addition of MIPI CSI-2 bridge support, make the ports node
explicit with the parallel port.

This way, it's clear that the controller only supports parallel
interface input and there's no confusion about the port number.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 7b2d684aeb97..7926c8b2ac5e 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -540,6 +540,15 @@  csi1: camera@1cb4000 {
 			clock-names = "bus", "mod", "ram";
 			resets = <&ccu RST_BUS_CSI>;
 			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				csi1_in_parallel: port@0 {
+					reg = <0>;
+				};
+			};
 		};
 
 		gic: interrupt-controller@1c81000 {