| Message ID | 1409666227-20622-6-git-send-email-rogerq@ti.com |
|---|---|
| State | Accepted |
| Commit | 2b54057c9b2638792bdd83b58bad7a0cdf5f4533 |
| Headers | show |
On Tuesday 02 September 2014 07:27 PM, Roger Quadros wrote: > For NAND read & write wait pin monitoring must be kept disabled as the > wait pin is only used to indicate NAND device ready status and not to > extend each read/write cycle. > I think this description, does not fit in this patch. And is incorrect as explained in previous patch review. > So don't print a warning if wait pin is specified while read/write > monitoring is not in the device tree. > > Sanity check wait pin number irrespective if read/write monitoring is > set or not. > > Signed-off-by: Roger Quadros <rogerq@ti.com> > --- But below mentioned checks and clean-up makes sense. So apart from first 3 lines of commit log .. Reviewed-by: Pekon Gupta <pekon@pek-sem.com> with regards, pekon ------------------------ Powered by BigRock.com -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 09/02/2014 10:12 PM, pekon wrote: > On Tuesday 02 September 2014 07:27 PM, Roger Quadros wrote: >> For NAND read & write wait pin monitoring must be kept disabled as the >> wait pin is only used to indicate NAND device ready status and not to >> extend each read/write cycle. >> > I think this description, does not fit in this patch. It fits the description because it gives the reason why wait monitoring is optional. > And is incorrect as explained in previous patch review. It is correct. I've pointed you to the relevant TRM sections where it is said that GPMC read/write monitoring must be disabled for NAND case. cheers, -roger > > >> So don't print a warning if wait pin is specified while read/write >> monitoring is not in the device tree. >> >> Sanity check wait pin number irrespective if read/write monitoring is >> set or not. >> >> Signed-off-by: Roger Quadros <rogerq@ti.com> >> --- > But below mentioned checks and clean-up makes sense. So > apart from first 3 lines of commit log .. > > Reviewed-by: Pekon Gupta <pekon@pek-sem.com> > > > with regards, pekon > > ------------------------ > Powered by BigRock.com > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 9f42d54..2f97228 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1207,8 +1207,7 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) } } - if ((p->wait_on_read || p->wait_on_write) && - (p->wait_pin > gpmc_nr_waitpins)) { + if (p->wait_pin > gpmc_nr_waitpins) { pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); return -EINVAL; } @@ -1288,8 +1287,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) p->wait_on_write = of_property_read_bool(np, "gpmc,wait-on-write"); if (!p->wait_on_read && !p->wait_on_write) - pr_warn("%s: read/write wait monitoring not enabled!\n", - __func__); + pr_debug("%s: rd/wr wait monitoring not enabled!\n", + __func__); } }
For NAND read & write wait pin monitoring must be kept disabled as the wait pin is only used to indicate NAND device ready status and not to extend each read/write cycle. So don't print a warning if wait pin is specified while read/write monitoring is not in the device tree. Sanity check wait pin number irrespective if read/write monitoring is set or not. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm/mach-omap2/gpmc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)