new file mode 100644
@@ -0,0 +1,46 @@
+#/** @file
+#
+# Component description file for DxeCorePL011SerialPortLib module
+#
+# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeCorePL011SerialPortLib
+ FILE_GUID = ED74F129-1287-4915-BA7A-1684A4C076F2
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SerialPortLib|DXE_CORE
+ CONSTRUCTOR = DxeCorePL011SerialPortLibInitialize
+
+[Sources.common]
+ DxeCorePL011SerialPortLib.c
+
+[LibraryClasses]
+ PL011UartLib
+ PcdLib
+ HobLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationPkg.dec
+
+[FixedPcd]
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+
+[Guids]
+ gEarlyPL011BaseAddressGuid
new file mode 100644
@@ -0,0 +1,142 @@
+/** @file
+ Serial I/O Port library functions with base address discovered from FDT
+
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
+ Copyright (c) 2014, Red Hat, Inc.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+#include <Pi/PiBootMode.h>
+#include <Uefi/UefiBaseType.h>
+#include <Uefi/UefiMultiPhase.h>
+#include <Pi/PiHob.h>
+#include <Library/HobLib.h>
+#include <Guid/EarlyPL011BaseAddress.h>
+
+#include <Drivers/PL011Uart.h>
+
+UINTN mSerialBaseAddress;
+
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+RETURN_STATUS
+EFIAPI
+DxeCorePL011SerialPortLibInitialize (
+ VOID
+ )
+{
+ VOID *Hob;
+ CONST UINT64 *UartBase;
+ UINT64 BaudRate;
+ UINT32 ReceiveFifoDepth;
+ EFI_PARITY_TYPE Parity;
+ UINT8 DataBits;
+ EFI_STOP_BITS_TYPE StopBits;
+
+ Hob = GetFirstGuidHob (&gEarlyPL011BaseAddressGuid);
+ if (Hob == NULL || GET_GUID_HOB_DATA_SIZE (Hob) != sizeof *UartBase) {
+ return RETURN_NOT_FOUND;
+ }
+ UartBase = GET_GUID_HOB_DATA (Hob);
+
+ mSerialBaseAddress = (UINTN)*UartBase;
+ if (mSerialBaseAddress == 0) {
+ return RETURN_NOT_FOUND;
+ }
+
+ BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
+ ReceiveFifoDepth = 0; // Use the default value for Fifo depth
+ Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
+ DataBits = PcdGet8 (PcdUartDefaultDataBits);
+ StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
+
+ return PL011UartInitializePort (
+ mSerialBaseAddress, &BaudRate, &ReceiveFifoDepth,
+ &Parity, &DataBits, &StopBits);
+}
+
+/**
+ Write data to serial device.
+
+ @param Buffer Point of data buffer which need to be written.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Write data failed.
+ @retval !0 Actual number of bytes written to serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+ )
+{
+ if (mSerialBaseAddress != 0) {
+ return PL011UartWrite (mSerialBaseAddress, Buffer, NumberOfBytes);
+ }
+ return 0;
+}
+
+/**
+ Read data from serial device and save the data in buffer.
+
+ @param Buffer Point of data buffer which need to be written.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Read data failed.
+ @retval !0 Actual number of bytes read from serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ if (mSerialBaseAddress != 0) {
+ return PL011UartRead (mSerialBaseAddress, Buffer, NumberOfBytes);
+ }
+ return 0;
+}
+
+/**
+ Check to see if any data is available to be read from the debug device.
+
+ @retval TRUE At least one byte of data is available to be read
+ @retval FALSE No data is available to be read
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+ VOID
+ )
+{
+ if (mSerialBaseAddress != 0) {
+ return PL011UartPoll (mSerialBaseAddress);
+ }
+ return FALSE;
+}
DXE_CORE is special because it can use - neither the original, in-place DTB (since DXE_CORE itself reallocates that memory for DXE purposes), - nor any dynamic PCDs (because the PCD PPI's are no more available, and the PCD protocol is not yet available). Therefore we can only rely on the HOB where we stashed the UART base address. Accordingly, the FdtLib dependency is replaced with a HobLib dependency (relative to EarlyFdtPL011SerialPortLib), and so is the PcdPL011BaseAddress dependency (relative to FdtPL011SerialPortLib). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> --- .../DxeCorePL011SerialPortLib.inf | 46 +++++++ .../DxeCorePL011SerialPortLib.c | 142 +++++++++++++++++++++ 2 files changed, 188 insertions(+) create mode 100644 ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/DxeCorePL011SerialPortLib.inf create mode 100644 ArmPlatformPkg/ArmVirtualizationPkg/Library/FdtPL011SerialPortLib/DxeCorePL011SerialPortLib.c