| Message ID | 1410528234-13545-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Not Applicable |
| Headers | show |
On 12 September 2014 14:23, Peter Maydell <peter.maydell@linaro.org> wrote: > Flushing a bunch of queued up ARM patches, a mix of new > features and bug fixes. > > thanks > -- PMM > > The following changes since commit 0dfa7e30126364c434a48cb37a1a41119e536c2a: > > Merge remote-tracking branch 'remotes/kraxel/tags/pull-console-20140905-2' into staging (2014-09-11 11:44:17 +0100) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140912 > > for you to fetch changes up to 92df845070290236d1b28b03453deec1ae9c4263: > > hw/arm/boot: enable DTB support when booting ELF images (2014-09-12 14:06:50 +0100) > Applied, thanks. -- PMM
Flushing a bunch of queued up ARM patches, a mix of new features and bug fixes. thanks -- PMM The following changes since commit 0dfa7e30126364c434a48cb37a1a41119e536c2a: Merge remote-tracking branch 'remotes/kraxel/tags/pull-console-20140905-2' into staging (2014-09-11 11:44:17 +0100) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140912 for you to fetch changes up to 92df845070290236d1b28b03453deec1ae9c4263: hw/arm/boot: enable DTB support when booting ELF images (2014-09-12 14:06:50 +0100) ---------------------------------------------------------------- target-arm: * add "linux,stdout-path" to the virt DTB * fix a long standing bug with IRQ disabling on Cortex-M CPUs * implement input interrupt logic in the PL061 * fix failure to load correct SP/PC on reset of Cortex-M CPUs if the vector table is not in a ROM-blob-in-RAM * provide flash devices for boot ROMs in the virt board * implement architectural watchpoints * fix misimplementation of Inner Shareable TLB operations that caused instability of guests in TCG SMP configurations * configure PL011 and PL031 in the virt board correctly with level-triggered interrupts rather than edge-triggered * support providing a device tree blob to ROM (firmware) images as well as to kernels ---------------------------------------------------------------- Ard Biesheuvel (5): hw/arm/virt: add linux, stdout-path to /chosen DT node hw/arm/boot: load DTB as a ROM image hw/arm/boot: pass an address limit to and return size from load_dtb() hw/arm/boot: load device tree to base of DRAM if no -kernel option was passed hw/arm/boot: enable DTB support when booting ELF images Colin Leitner (1): pl061: implement input interrupt logic David Hoover (1): cpu-exec.c: Allow disabling of IRQs on ARM Cortex-M CPUs Martin Galvan (2): target-arm: Fix resetting issues on ARMv7-M CPUs target-arm: Fix broken indentation in arm_cpu_reest() Peter Maydell (14): hw/arm/virt: Provide flash devices for boot ROMs exec.c: Relax restrictions on watchpoint length and alignment exec.c: Provide full set of dummy wp remove functions in user-mode exec.c: Record watchpoint fault address and direction cpu-exec: Make debug_excp_handler a QOM CPU method target-arm: Implement setting of watchpoints target-arm: Move extended_addresses_enabled() to internals.h target-arm: Implement handling of fired watchpoints target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32 target-arm: Remove comment about MDSCR_EL1 being dummy implementation target-arm: Implement minimal DBGVCR, OSDLR_EL1, MDCCSR_EL0 target-arm: Push legacy wildcard TLB ops back into v6 target-arm: Make *IS TLB maintenance ops affect all CPUs hw/arm/virt: fix pl011 and pl031 irq flags cpu-exec.c | 17 +-- exec.c | 61 ++++++-- hw/arm/boot.c | 71 ++++++++- hw/arm/virt.c | 76 ++++++++- hw/gpio/pl061.c | 59 +++++-- include/exec/exec-all.h | 4 - include/qom/cpu.h | 10 +- linux-user/main.c | 3 +- qom/cpu.c | 5 + target-arm/cpu.c | 37 +++-- target-arm/cpu.h | 2 + target-arm/helper.c | 397 +++++++++++++++++++++++++++++++++++++++--------- target-arm/internals.h | 30 ++++ target-arm/machine.c | 3 + target-arm/op_helper.c | 188 +++++++++++++++++++++++ target-i386/cpu.c | 6 +- target-i386/cpu.h | 2 +- target-i386/helper.c | 5 +- target-lm32/cpu.c | 2 +- target-lm32/cpu.h | 2 +- target-lm32/helper.c | 5 +- target-xtensa/cpu.c | 2 +- target-xtensa/cpu.h | 2 +- target-xtensa/helper.c | 5 +- 24 files changed, 840 insertions(+), 154 deletions(-)