@@ -630,16 +630,11 @@ static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
int func = (dev->device & 0x0f00) >> 8;
/*
- * If this is a T4 or later based adapter, the special VPD is at offset
- * 0x400 for the Physical Functions (the SR-IOV Virtual Functions have
- * no VPD Capabilities). The PCI VPD Access core routines will normally
- * compute the size of the VPD by parsing the VPD Data Structure at
- * offset 0x000. This will result in silent failures when attempting
- * to accesses these other VPD areas which are beyond those computed
- * limits.
+ * If this is a T4 or later based adapter, provide access to the full
+ * virtual EEPROM address space.
*/
if (chip >= 0x4 && func < 0x8)
- pci_set_vpd_size(dev, 2048);
+ pci_set_vpd_size(dev, PCI_VPD_MAX_SIZE);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
cxgb4 uses the full VPD address space for accessing its EEPROM (with some mapping, see t4_eeprom_ptov()). In cudbg_collect_vpd_data() it sets the VPD len to 32K (PCI_VPD_MAX_SIZE), and then back to 2K (CUDBG_VPD_PF_SIZE). Having official (structured) and unofficial (unstructured) VPD data violates the PCI spec, let's set VPD len according to all data that can be accessed via PCI VPD access, no matter of its structure. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- drivers/pci/vpd.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)