@@ -22,6 +22,8 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+- power-domain-master: phandle to a master power domain that the given domain
+ is a part of
Node of a device using power domains must have a samsung,power-domain property
defined with a phandle to respective power domain.
@@ -108,7 +108,7 @@ static int exynos_pd_power_off(struct generic_pm_domain *domain)
static __init int exynos4_pm_init_power_domain(void)
{
struct platform_device *pdev;
- struct device_node *np;
+ struct device_node *np, *master_np;
for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
struct exynos_pm_domain *pd;
@@ -159,6 +159,13 @@ no_clk:
pm_genpd_init(&pd->pd, NULL, !on);
of_genpd_add_provider_simple(np, &pd->pd);
+
+ /* make master and slave hierarchy */
+ master_np = of_parse_phandle(np, "power-domain-master", 0);
+ if (master_np) {
+ pm_genpd_add_subdomain_names(master_np->name, np->name);
+ of_node_put(master_np);
+ }
}
return 0;