diff mbox series

[V3,2/4] Documentation: bindings: clk: Add bindings for i.MX BLK_CTL

Message ID 20210506041555.10719-3-peng.fan@oss.nxp.com
State Superseded
Headers show
Series soc: imx: add i.MX BLK-CTL support | expand

Commit Message

Peng Fan (OSS) May 6, 2021, 4:15 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>


Document the i.MX BLK_CTL with its devicetree properties.

Each BLK CTL have different power domain inputs and they have different
names, so we are not able to list all the power domain names for each
BLK CTL here.

For example:
i.MX8MM dispmix BLK CTL, it has
	power-domains = <&pgc_dispmix>, <&pgc_mipi>;
	power-domain-names = "dispmix", "mipi";

vpumix BLK CTL, it has
	power-domains = <&vpumix_pd>, <&vpu_g1_pd>, <&vpu_g2_pd>,
			<&vpu_h1_pd>;
	power-domain-names = "vpumix", "g1", "g2", "h1";

Signed-off-by: Peng Fan <peng.fan@nxp.com>

---
 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

-- 
2.30.0

Comments

Rob Herring (Arm) May 7, 2021, 1:02 a.m. UTC | #1 
On Thu, 06 May 2021 12:15:53 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>

> 

> Document the i.MX BLK_CTL with its devicetree properties.

> 

> Each BLK CTL have different power domain inputs and they have different

> names, so we are not able to list all the power domain names for each

> BLK CTL here.

> 

> For example:

> i.MX8MM dispmix BLK CTL, it has

> 	power-domains = <&pgc_dispmix>, <&pgc_mipi>;

> 	power-domain-names = "dispmix", "mipi";

> 

> vpumix BLK CTL, it has

> 	power-domains = <&vpumix_pd>, <&vpu_g1_pd>, <&vpu_g2_pd>,

> 			<&vpu_h1_pd>;

> 	power-domain-names = "vpumix", "g1", "g2", "h1";

> 

> Signed-off-by: Peng Fan <peng.fan@nxp.com>

> ---

>  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     | 66 +++++++++++++++++++

>  1 file changed, 66 insertions(+)

>  create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

> 


Reviewed-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
new file mode 100644
index 000000000000..a66f11acc6b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
@@ -0,0 +1,66 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-blk-ctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX BLK_CTL
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description:
+  i.MX BLK_CTL is a conglomerate of different GPRs that are
+  dedicated to a specific subsystem. It usually contains
+  clocks and resets amongst other things. Here we take the clocks
+  and resets as virtual PDs, the reason we could not take it as
+  clock provider is there is A/B lock issue between power domain
+  and clock.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8mm-dispmix-blk-ctl
+          - fsl,imx8mm-vpumix-blk-ctl
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  "#power-domain-cells":
+    const: 1
+
+  power-domains:
+    minItems: 1
+    maxItems: 32
+
+  power-domain-names:
+    minItems: 1
+    maxItems: 32
+
+  clocks:
+    minItems: 1
+    maxItems: 32
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - power-domain-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mm-clock.h>
+
+    dispmix_blk_ctl: blk-ctl@32e28000 {
+      compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
+      reg = <0x32e28000 0x100>;
+      #power-domain-cells = <1>;
+      power-domains = <&pgc_dispmix>, <&pgc_mipi>;
+      power-domain-names = "dispmix", "mipi";
+      clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+               <&clk IMX8MM_CLK_DISP_APB_ROOT>;
+    };