| Message ID | 20210521095243.8527-1-thunder.leizhen@huawei.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/1] arm64: dts: mt8173-elm: Correct the value of the property 'reg' | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index 21452c51a20a813..9bc02ea020f10e8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -1112,7 +1112,7 @@ rtc: mt6397rtc { syscfg_pctl_pmic: syscfg_pctl_pmic@c000 { compatible = "mediatek,mt6397-pctl-pmic-syscfg", "syscon"; - reg = <0 0x0000c000 0 0x0108>; + reg = <0x0000c000 0x0108>; }; }; };
The values of property '#address-cells' and '#size-cells' defined in the parent node are both 1. Therefore, the value 0 of the upper 32 bits cannot be written. This error is detected by reg.yaml, the information reported is as follows: arch/arm64/boot/dts/mediatek/mt8173-elm.dt.yaml: mt6397: syscfg_pctl_pmic@c000:reg:0: [0, 49152, 0, 264] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.26.0.106.g9fadedd