Message ID | 20210610082040.2075611-5-miquel.raynal@bootlin.com |
---|---|
State | Accepted |
Commit | 6c74a55e1d791be9758d9f23b1c5375854949188 |
Headers | show |
Series | ARM Primecell PL35x support | expand |
diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt index 233b2fd8525b..105160c795a1 100644 --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt @@ -18,6 +18,10 @@ The child device node represents the controller connected to the SMC bus. Only one between: NAND controller, NOR controller and SRAM controller is allowed in a single system. +Required device node properties: + +- reg: Contains the chip-select id, the offset and the length + of the memory region requested by the device. Example: smcc: memory-controller@e000e000