Message ID | 1428656311-2605-7-git-send-email-peter.griffin@linaro.org |
---|---|
State | New |
Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id kv3si2047653pbc.61.2015.04.10.02.00.54; Fri, 10 Apr 2015 02:00:56 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932232AbbDJJAn (ORCPT <rfc822;ivan.khoronzhuk@linaro.org> + 27 others); Fri, 10 Apr 2015 05:00:43 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:37608 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754973AbbDJI66 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 10 Apr 2015 04:58:58 -0400 Received: by wiaa2 with SMTP id a2so18521337wia.0 for <linux-kernel@vger.kernel.org>; Fri, 10 Apr 2015 01:58:57 -0700 (PDT) X-Received: by 10.194.61.244 with SMTP id t20mr999483wjr.83.1428656337206; Fri, 10 Apr 2015 01:58:57 -0700 (PDT) Received: from localhost.localdomain ([31.105.225.148]) by mx.google.com with ESMTPSA id ew5sm23844403wic.14.2015.04.10.01.58.54 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Apr 2015 01:58:56 -0700 (PDT) From: Peter Griffin <peter.griffin@linaro.org> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, maxime.coquelin@st.com, patrice.chotard@st.com, srinivas.kandagatla@gmail.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, peppe.cavallaro@st.com Subject: [PATCH v4 6/9] mmc: sdhci-st: Update the quirks for this controller. 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diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c index 2ce842b..751452b 100644 --- a/drivers/mmc/host/sdhci-st.c +++ b/drivers/mmc/host/sdhci-st.c @@ -340,7 +340,10 @@ static const struct sdhci_ops sdhci_st_ops = { static const struct sdhci_pltfm_data sdhci_st_pdata = { .ops = &sdhci_st_ops, .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | - SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, + SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | + SDHCI_QUIRK_NO_HISPD_BIT, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_STOP_WITH_TC, };