diff mbox series

[PULL,12/33] target/ppc: Restrict ppc_cpu_tlb_fill to TCG

Message ID 20210709051728.170203-13-david@gibson.dropbear.id.au
State Accepted
Commit cbf35bac39265f278863f9452ceb9ad69cc311ef
Headers show
Series None | expand

Commit Message

David Gibson July 9, 2021, 5:17 a.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>


This function is used by TCGCPUOps, and is thus TCG specific.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Message-Id: <20210621125115.67717-10-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

---
 target/ppc/mmu_helper.c | 2 ++
 1 file changed, 2 insertions(+)

-- 
2.31.1
diff mbox series

Patch

diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index a0e4e027d3..ba1952c77d 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -2948,6 +2948,7 @@  hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
     return -1;
 }
 
+#ifdef CONFIG_TCG
 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr eaddr, int size,
                       MMUAccessType access_type, int mmu_idx,
                       bool probe, uintptr_t retaddr)
@@ -2968,3 +2969,4 @@  bool ppc_cpu_tlb_fill(CPUState *cs, vaddr eaddr, int size,
     raise_exception_err_ra(&cpu->env, cs->exception_index,
                            cpu->env.error_code, retaddr);
 }
+#endif