| Message ID | 998a94922be5d0ec810bae6f4775ac9de79ff87b.1626176145.git.baruch@tkos.co.il |
|---|---|
| State | New |
| Headers | show |
| Series | [v5,1/4] arm64: dts: ipq6018: correct TCSR block area | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 72ac36c1be57..06b6676097e8 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -355,6 +355,15 @@ i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */ status = "disabled"; }; + pwm: pwm { + #pwm-cells = <2>; + compatible = "qcom,ipq6018-pwm"; + qcom,pwm-regs = <&tcsr_q6 0xa010>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + clock-names = "core"; + status = "disabled"; + }; + qpic_bam: dma-controller@7984000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0 0x07984000 0x0 0x1a000>;
Describe the PWM block on IPQ6018. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)