| Message ID | 20210720144121.66713-2-robh@kernel.org |
|---|---|
| State | Accepted |
| Commit | 29fc76957a9754768cfa3884b413ffc10f82d3b4 |
| Headers | show |
| Series | None | expand |
On 20.07.21 17:41, Rob Herring wrote: > In preparation to convert OPP bindings to DT schema, clean-up a few OPP > binding node names in the binding examples. > > Cc: Georgi Djakov <djakov@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Leonard Crestez <leonard.crestez@nxp.com> > Cc: dri-devel@lists.freedesktop.org > Cc: linux-pm@vger.kernel.org > Acked-by: Viresh Kumar <viresh.kumar@linaro.org> > Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Georgi Djakov <djakov@kernel.org> > --- > Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 2 +- > Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 +- > .../devicetree/bindings/interconnect/fsl,imx8m-noc.yaml | 4 ++-- > 3 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml > index 0f73f436bea7..4bea51d1e7ea 100644 > --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml > @@ -136,7 +136,7 @@ examples: > resets = <&reset 0>, <&reset 1>; > }; > > - gpu_opp_table: opp_table0 { > + gpu_opp_table: opp-table { > compatible = "operating-points-v2"; > > opp-533000000 { > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml > index 696c17aedbbe..d209f272625d 100644 > --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml > @@ -160,7 +160,7 @@ examples: > #cooling-cells = <2>; > }; > > - gpu_opp_table: opp_table0 { > + gpu_opp_table: opp-table { > compatible = "operating-points-v2"; > > opp-533000000 { > diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml > index a8873739d61a..b8204ed22dd5 100644 > --- a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml > +++ b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml > @@ -81,10 +81,10 @@ examples: > noc_opp_table: opp-table { > compatible = "operating-points-v2"; > > - opp-133M { > + opp-133333333 { > opp-hz = /bits/ 64 <133333333>; > }; > - opp-800M { > + opp-800000000 { > opp-hz = /bits/ 64 <800000000>; > }; > }; >
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 0f73f436bea7..4bea51d1e7ea 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -136,7 +136,7 @@ examples: resets = <&reset 0>, <&reset 1>; }; - gpu_opp_table: opp_table0 { + gpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-533000000 { diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 696c17aedbbe..d209f272625d 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -160,7 +160,7 @@ examples: #cooling-cells = <2>; }; - gpu_opp_table: opp_table0 { + gpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-533000000 { diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml index a8873739d61a..b8204ed22dd5 100644 --- a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml +++ b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml @@ -81,10 +81,10 @@ examples: noc_opp_table: opp-table { compatible = "operating-points-v2"; - opp-133M { + opp-133333333 { opp-hz = /bits/ 64 <133333333>; }; - opp-800M { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; }; };