Message ID | 20210721141725.23346-4-peng.fan@oss.nxp.com |
---|---|
State | Superseded |
Headers | show
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Wed, 21 Jul 2021 13:43:23 +0000 From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: sbabic@denx.de, festevam@gmail.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, Peng Fan <peng.fan@nxp.com> Subject: [PATCH V4 03/44] arm: imx: sys_proto: move boot mode define to common header Date: Wed, 21 Jul 2021 22:16:44 +0800 Message-Id: <20210721141725.23346-4-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210721141725.23346-1-peng.fan@oss.nxp.com> References: <20210721141725.23346-1-peng.fan@oss.nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SG2PR0401CA0015.apcprd04.prod.outlook.com (2603:1096:3:1::25) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR0401CA0015.apcprd04.prod.outlook.com (2603:1096:3:1::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4331.21 via Frontend Transport; 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Series |
imx: add i.MX8ULP support
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expand
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diff --git a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h index 0e4c8ad15d..0daa922fad 100644 --- a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h @@ -8,14 +8,5 @@ #include <asm/mach-imx/sys_proto.h> -#define BT0CFG_LPBOOT_MASK 0x1 -#define BT0CFG_DUALBOOT_MASK 0x2 - -enum bt_mode { - LOW_POWER_BOOT, /* LP_BT = 1 */ - DUAL_BOOT, /* LP_BT = 0, DUAL_BT = 1 */ - SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */ -}; - enum boot_device get_boot_device(void); #endif diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index ad446940ff..e3ee58c9f8 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -178,6 +178,16 @@ enum boot_dev_type_e { extern struct rom_api *g_rom_api; #endif +/* For i.MX ULP */ +#define BT0CFG_LPBOOT_MASK 0x1 +#define BT0CFG_DUALBOOT_MASK 0x2 + +enum bt_mode { + LOW_POWER_BOOT, /* LP_BT = 1 */ + DUAL_BOOT, /* LP_BT = 0, DUAL_BT = 1 */ + SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */ +}; + u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void);