| Message ID | 1431893048-5214-4-git-send-email-parth.dixit@linaro.org |
|---|---|
| State | New |
| Headers | show |
+shannon On 18 May 2015 at 18:33, Julien Grall <julien.grall@citrix.com> wrote: > Hi Parth, > > On 17/05/15 21:03, Parth Dixit wrote: >> add macros to emulate x86 style ports for arm. >> This avoids modification in common code for acpi. > > This patch looks wrong to me. On ARM ioport access is done using the PCI > address space. > > If it's not easy to have a correct implementation, I still prefer > modification in common ACPI code. > > Regards, > > -- > Julien Grall
diff --git a/xen/include/asm-arm/arm64/io.h b/xen/include/asm-arm/arm64/io.h index 37abc47..7ad9b65 100644 --- a/xen/include/asm-arm/arm64/io.h +++ b/xen/include/asm-arm/arm64/io.h @@ -20,6 +20,7 @@ #ifndef _ARM_ARM64_IO_H #define _ARM_ARM64_IO_H +#include <asm/system.h> #include <asm/byteorder.h> /* @@ -109,4 +110,17 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) +/* + * Emulate x86 io ports for arm. + */ +#define __armio(addr) ( (void __iomem *)addr ) + +#define inb(c) ( readb( __armio(c) ) ) +#define inw(c) ( readw( __armio(c) ) ) +#define inl(c) ( readl( __armio(c) ) ) + +#define outb(v, c) ( writeb(v, __armio(c) ) ) +#define outw(v, c) ( writew(v, __armio(c) ) ) +#define outl(v, c) ( writel(v, __armio(c) ) ) + #endif /* _ARM_ARM64_IO_H */
add macros to emulate x86 style ports for arm. This avoids modification in common code for acpi. Signed-off-by: Parth Dixit <parth.dixit@linaro.org> --- xen/include/asm-arm/arm64/io.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+)