| Message ID | 20210728115203.16263-3-qiangqing.zhang@nxp.com |
|---|---|
| State | Accepted |
| Commit | df11b8073e19bd0eedae630dae82f38eb374b80d |
| Headers | show |
| Series | net: fec: add support for i.MX8MQ and i.MX8QM | expand |
On Wed, Jul 28, 2021 at 07:51:58PM +0800, Joakim Zhang wrote: > + The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at 250Mhz. > + The clock is required if SoC RGMII enable clock delay. Hi Joakim So you only need the clock if you are using RGMII delays? For RGMII without delays, the clock is not needed? You might want to add a check in the C code that the clock is provided when needed. Andrew
> -----Original Message----- > From: Andrew Lunn <andrew@lunn.ch> > Sent: 2021年7月28日 22:08 > To: Joakim Zhang <qiangqing.zhang@nxp.com> > Cc: davem@davemloft.net; kuba@kernel.org; robh+dt@kernel.org; > shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de; > festevam@gmail.com; dl-linux-imx <linux-imx@nxp.com>; > netdev@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org > Subject: Re: [PATCH V2 net-next 2/7] dt-bindings: net: fsl,fec: add RGMII > internal clock delay > > On Wed, Jul 28, 2021 at 07:51:58PM +0800, Joakim Zhang wrote: > > > + The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at > 250Mhz. > > + The clock is required if SoC RGMII enable clock delay. > > Hi Joakim > > So you only need the clock if you are using RGMII delays? For RGMII without > delays, the clock is not needed? > > You might want to add a check in the C code that the clock is provided when > needed. Hi Andrew, Yes, we only need this clock for RGMII delays, the clock is not needed for RGMII without delays. Had better add below check to avoid enabling needless clock. if (fep->rgmii_txc_dly || fep->rgmii_rxc_dly) Best Regards, Joakim Zhang > Andrew
diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml index b14e0e7c1e42..eca41443fcce 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -96,6 +96,8 @@ properties: SOC internal PLL. The "enet_out"(option), output clock for external device, like supply clock for PHY. The clock is required if PHY clock source from SOC. + The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at 250Mhz. + The clock is required if SoC RGMII enable clock delay. clock-names: minItems: 2 @@ -107,6 +109,7 @@ properties: - ptp - enet_clk_ref - enet_out + - enet_2x_txclk phy-mode: true @@ -118,6 +121,12 @@ properties: mac-address: true + tx-internal-delay-ps: + enum: [0, 2000] + + rx-internal-delay-ps: + enum: [0, 2000] + phy-supply: description: Regulator that powers the Ethernet PHY.
Add RGMII internal clock delay for FEC controller. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> --- Documentation/devicetree/bindings/net/fsl,fec.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)