| Message ID | 20211203140126.3132770-1-dinguyen@kernel.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [PATCHv2,1/3] dt-bindings: spi: cadence-quadspi: document "cdns,qspi-nor-ver-00-10" | expand |
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index ca155abbda7a..2833e1c8841d 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -29,6 +29,7 @@ properties: - ti,am654-ospi - intel,lgm-qspi - xlnx,versal-ospi-1.0 + - cdns,qspi-nor-ver-00-10 - const: cdns,qspi-nor - const: cdns,qspi-nor
The QSPI controller on Intel's SoCFPGA platform does not implement the CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register results in a crash. The module/revision ID is written in the MODULE_ID register. For this variance, bits 23-8 is 0x0010. Introduce the dts binding "cdns,qspi-nor-ver-00-10" to differentiate the hardware. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2: change binding to "cdns,qspi-nor-0010" to be more generic for other platforms --- Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml | 1 + 1 file changed, 1 insertion(+)