@@ -265,6 +265,14 @@ properties:
- const: vfe_lite0
- const: vfe_lite1
+ vdda-phy-supply:
+ description:
+ Phandle to a regulator supply to PHY core block.
+
+ vdda-pll-supply:
+ description:
+ Phandle to 1.8V regulator supply to PHY refclk pll block.
+
required:
- clock-names
- clocks
@@ -277,6 +285,8 @@ required:
- power-domains
- reg
- reg-names
+ - vdda-phy-supply
+ - vdda-pll-supply
additionalProperties: false
@@ -316,6 +326,9 @@ examples:
"vfe_lite0",
"vfe_lite1";
+ vdda-phy-supply = <&vreg_l5a_0p88>;
+ vdda-pll-supply = <&vreg_l9a_1p2>;
+
interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
Add in missing vdda-phy-supply and vdda-pll-supply declarations. The sm8250 USB, PCIe, UFS, DSI and CSI PHYs use a common set of vdda rails. Define the CSI vdda regulators in the same way the qmp PHY does. Cc: devicetree@vger.kernel.org Cc: robh@kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- .../bindings/media/qcom,sm8250-camss.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+)