@@ -135,6 +135,20 @@
status = "disabled";
};
+ sdmmc2: mmc@58007000 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x20253180>;
+ reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&clk_pll4_p>;
+ clock-names = "apb_pclk";
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <130000000>;
+ status = "disabled";
+ };
+
iwdg2: watchdog@5a002000 {
compatible = "st,stm32mp1-iwdg";
reg = <0x5a002000 0x400>;
STM32MP13 embeds 2 instances of SDMMC peripheral. Add the required information in SoC device tree file. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> --- arch/arm/boot/dts/stm32mp131.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)