diff mbox series

dt-bindings: iommu: renesas,ipmmu-vmsa: Reformat renesas,ipmmu-main description

Message ID ea2205791573e6d99f3cb65cae99bdbfa4f65c97.1643199809.git.geert+renesas@glider.be
State New
Headers show
Series dt-bindings: iommu: renesas,ipmmu-vmsa: Reformat renesas,ipmmu-main description | expand

Commit Message

Geert Uytterhoeven Jan. 26, 2022, 12:24 p.m. UTC 
Remove trailing whitespace and break overly long lines.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml       | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
index 507853fcc746eea1..67da53e8d4d10aa0 100644
--- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
+++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
@@ -69,9 +69,9 @@  properties:
     items:
       - items:
           - description: phandle to main IPMMU
-          - description: the interrupt bit number associated with the particular 
-              cache IPMMU device. The interrupt bit number needs to match the main 
-              IPMMU IMSSTR register. Only used by cache IPMMU instances.
+          - description: the interrupt bit number associated with the particular
+              cache IPMMU device. The interrupt bit number needs to match the
+              main IPMMU IMSSTR register. Only used by cache IPMMU instances.
     description:
       Reference to the main IPMMU phandle plus 1 cell. The cell is
       the interrupt bit number associated with the particular cache IPMMU